Commit Graph

620 Commits

Author SHA1 Message Date
Oleksij Rempel
1c22f5b7de doc: fix typo in "adapter usb location" command
Change-Id: If959c5461904cdf4bcdf1887a9afaa9c2c94282b
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4907
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-14 14:31:49 +00:00
Tomas Vanek
dd9b7296bd doc/openocd.texi: fix xref warning
Xref without trailing '.' or ',' was introduced in
deaf3d2641

Change-Id: I99afd40e1ffeddd1298b7b07e4deba3dcc41799f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4905
Tested-by: jenkins
2019-02-14 09:29:00 +00:00
Oleksij Rempel
20ceec69a2 doc: add documentation for "adapter usb location" command
Change-Id: Ia3fbe0c3894b1b96464bbfda5d4101123827b761
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4769
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07 09:04:59 +00:00
Jan Vojtech
9f576d3f48 flash/nor/stm32f1x: Ability to change user option bytes.
Adds ability to change the user data in STM32F1x/STM32F3x MCU's option byte.
Since OpenOCD prints the content of user data in option byte registers, it
is seems logical to also provide a way how to change this data.

Change-Id: Ie6cb756b4f11b5c6dabd34bc89434a358eb758ff
Signed-off-by: Jan Vojtech <honza.vojtech@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4663
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2019-02-07 07:52:44 +00:00
Tomas Vanek
deaf3d2641 flash/nor: flash driver and cfg for SAM E54, E53, E51 and D51
The new Microchip (former Atmel) series powered by Cortex-M4 looks
very similar to older M0+ powered SAM D2x at the first sight.
Unfortunately the new series differs a lot in important details.
NVMCTRL has different register addresses, moved important bits
and even changed binary command set. An universal driver for all SAM D/E
would be very complicated. That's why a new driver was derived.

Tested on Microchip SAM E54 Xplained Pro kit (board cfg included).

Adjusted for the restructured dap support.
Checked by valgrind and clang static analyzer.

Change-Id: I26c67047a552076f4b207b9b89285a53d69b4ca4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4272
Tested-by: jenkins
Reviewed-by: Andres Vahter <andres.vahter@gmail.com>
2019-02-05 17:45:18 +00:00
Tim Newsome
31ea7037b3 Add flash support for SiFive's Freedom E platforms
Valgrind and Clang Static Analyzer have no complaints about this change.

Change-Id: I7757615ec52448372bdc57729cdf97c7016d97e8
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4656
Tested-by: jenkins
Reviewed-by: Philipp Guehring <pg@futureware.at>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-11 19:50:09 +00:00
Edward Fewell
615a066629 drivers: xds110: Add support for XDS110 stand-alone probe
The XDS110 stand-alone version has the ability to supply
voltage to the target board via it's AUX FUNCTIONS port.
Added command to enable setting the voltage on the XDS110
stand-alone.

Change-Id: I2f21c4a3d15ed99e649f3a83973c5e724c4bfeb6
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4793
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2019-01-08 09:49:03 +00:00
Rod Boyce
b3ed97a492 NOR: lpc2000 Add support for LPC84x devices
These devices differ from LPC8xx devices in that they have a different
IAP entry point, but everything else is the same.  Using Tcl to pass
different IAP entry point.
no new Clang analyser warnings and no new build sanitizers issues.

Change-Id: I2d654dd250f416e74262c0228cad8713a283402f
Signed-off-by: Rod Boyce <developer@teamboyce.co.uk>
Reviewed-on: http://openocd.zylin.com/4684
Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02 21:54:03 +00:00
Oleksij Rempel
8f777bc1a6 flash: nor: ath79: remove base calculation
Currently it is impossible to flash ELF with correct offsets. The reason
is a bogus offset calculation extracted from base.
Since any other spi drivers do not care about base, do the same for
ath79 as well.

Change-Id: I9e46e01c9e7a709c2d07da9203c634f302603afd
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4821
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-01-02 21:53:41 +00:00
Jean-Christian de Rivaz
a15c11d7d0 Add LPC8Nxx and NHS3xx support.
Change-Id: I0bdbca8dd9b234aca355230af7269463c9f70bd1
Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-on: http://openocd.zylin.com/4515
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-23 15:08:36 +00:00
Simon Qian
fdaa8711ae add w600 support
w600 is a wifi soc from winner micro(www.winnermicro.com).

Change-Id: Ib8ccd6e52baefca6547fb97d29db75db0ee73948
Signed-off-by: Simon Qian <versaloon@simonqian.com>
Reviewed-on: http://openocd.zylin.com/4801
Tested-by: jenkins
Reviewed-by: yichen <wdyichen@wdyichen.cn>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-21 07:11:19 +00:00
Tomas Vanek
936dc7cbd9 target/cortex_m: fix cortex_m reset_config help and check for syntax error
Remove option 'srst' which is not recognized from on-line help and texi.
Check parameter and return syntax error if wrong option is entered.

Change-Id: I87daa423a9f53193a0b015080594820b933628f5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4795
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-19 13:14:27 +00:00
Tomas Vanek
cb5c6477f5 target/cortex_m: do not use VECTRESET on Cortex-M0, M0+ and M1
Cortex-M0, M0+ and M1 do not support VECTRESET bit in AIRCR.
Without this change the 'reset' command silently fails if VECTRESET
is requested.

Detect these cores, show warning if VECTRESET is about to use
and use SYSRESETREQ instead.

Change-Id: Ief174373e3ef0e6b287c57911c0aca4dfa8209f2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4794
Tested-by: jenkins
Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-19 13:14:09 +00:00
Steven Stallion
c5eb990825 esirisc: support eSi-Trace
This patch adds support for instruction tracing to eSi-RISC targets. The
command interface is borrowed heavily from ETM; eSi-Trace uses a less
sophisticated model for tracing, however the setup and usage is similar.
This patch also cleans up the command interfaces of the other esirisc
command groups and adds additional debugging information to log messages
when dealing with CSRs.

This patch "finalizes" support for 32-bit eSi-RISC targets.

Change-Id: Ia2a9de79a3c7c066240b5212721fb1b7584a9a45
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4780
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-12 08:47:44 +00:00
Edward Fewell
f56e28b2c8 flash/nor: update CC26xx/CC13xx support
Added fixes found in additional code reviews.

Remove inappropriate use of bank_number field and updated
documentation to reflect the change.

Restored functionality to cc2538.cfg file because previous
change removed the cc26xx.cfg file because the flash support
changes made it obsolete. Rolled the previous cc26xx.cfg
file into cc2538.cfg and updated it to work with other
recent changes.  Tested using a SmartRF06 Evaluation
board with embedded XDS100v3 and external XDs110.

Change-Id: Ia19d00cf8055c5c0f1acc53aa23fd06a80fd2ebc
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4787
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-12-11 13:27:17 +00:00
Spencer Oliver
68f09deb4f doc: add ARMv6-M info regarding TAP Declaration
Change-Id: I89095fd0c830fdc2ce40e5d23f8af98502b0ff50
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4782
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2018-12-06 13:08:35 +00:00
Antonio Borneo
32aec3b5c8 doc: fix some typo about STMicroelectronics name
s/ST/STMicroelectronics/
s/ST Micro/STMicroelectronics/
s/ST Microelectronics/STMicroelectronics/

Change-Id: I62aef331d172db22a70841a089c1889e37997cde
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4718
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:07:06 +00:00
Antonio Borneo
0bad9a42a3 stlink: add support for STLINK-V3
Extend the driver to include the minimal functionality to support
the HLA model.
Due to the small change in the name (ST-LINK/V2 => STLINK-V3), fix
the existing names in the comments in udev rules.

Change-Id: Ied33e38063a6da81d9bf249ed195444d7cdf4f03
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4717
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2018-12-06 13:06:59 +00:00
EMARD
dc415cb26c jtag: drivers: ft232r: unhardcoded
FT232R: introducing configurable parameters for pinout,
initial buffer size, state of RS232 signals at exit with
option to reattach kernel driver. All this was hardcoded before.
New parameters are documented in "openocd.texi" file.
Allows hopfully self-explainable and user-friendly adaptation to
various pinouts and similar chips like FT230X and FT231X.

Change-Id: Ib807f2ea3d4c1a164d351d65aeacd1978318d217
Signed-off-by: EMARD <vordah@gmail.com>
Reviewed-on: http://openocd.zylin.com/4681
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-12-06 08:51:01 +00:00
Matthias Welwarsky
010b09121c armv7a: ARMv7-A MMU tools
factor out mmu-related code from armv7a.c, add a 'dump' command for
page tables.

Change-Id: Ic1ac3c645d7fd097e9d625c7c8302e7065875dd4
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4327
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-11-08 09:10:09 +00:00
Dominik Peklo
cea40152f8 flash/nor/stm32f1x: Use of protection blocks, improved option bytes handling
Handle write protection status in blocks instead of sectors, removing
unnecessary complexity in the process. Now closer to stm32f2x.
Support sequential modification of option bytes by read/modify/write
directly to option bytes area instead of always starting with the
currently loaded bytes from FLASH_OBR/WRPR registers.
Added new command 'options_load' to force re-load of option bytes w/o
having to power cycle target.

Change-Id: I5c76191e29c17a1e11482df06379d10ca8d6d04d
Signed-off-by: Dominik Peklo <dom.peklo@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4576
Tested-by: jenkins
Reviewed-by: Jan Vojtěch <honza.vojtech@gmail.com>
2018-11-03 11:18:18 +00:00
Steven Stallion
4ab75a3634 esirisc: support eSi-RISC targets
eSi-RISC is a highly configurable microprocessor architecture for
embedded systems provided by EnSilica. This patch adds support for
32-bit targets and also includes an internal flash driver and
uC/OS-III RTOS support. This is a non-traditional target and required
a number of additional changes to support non-linear register numbers
and the 'p' packet in RTOS support for proper integration into
EnSilica's GDB port.

Change-Id: I59d5c40b3bb2ace1b1a01b2538bfab211adf113f
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4660
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-10-16 11:58:24 +01:00
Tim Newsome
e2b6f347c7 Clarify what exactly the RISC-V code supports.
Change-Id: I8da657426cc52c738ab41bfb0164cbc6721c0aef
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4655
Tested-by: jenkins
Reviewed-by: Philipp Guehring <pg@futureware.at>
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-25 20:57:58 +01:00
Thomas Søhus
b2d259f67c Added support for STM32L4X option bytes writing.
Enables the programming of Write protection lock bits.

- Updated/re-factored with option_read, option_write and option_load commands.

Change-Id: I86358c7eb1285c3c0baac1564e46da8ced5fd025
Signed-off-by: Thomas Søhus <tls@ceepro.dk>
Reviewed-on: http://openocd.zylin.com/4654
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-09-19 05:37:33 +01:00
Antonio Borneo
4423a58b4d doc: fix use of deprecated config file in the example
Commit 31c58c139d ("jtag: drivers: stlink: handle all versions with
single config") deprecates the use of "interface/stlink-v2-1.cfg" in
favor of a unique config file "interface/stlink.cfg".

Update the example in the documentation.

Change-Id: I1aed7c70e15f4edb4f81a3ee8e3bce575fde873b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4667
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2018-09-17 17:18:55 +01:00
Antonio Borneo
ab858febb6 gdb_server: add per target option "-gdb-port"
The argument passed to global config command "gdb_port" is usually,
but not always, a TCP port number. In case of multiple targets, this
numeric value is used as the first port of a set of consecutive TCP
ports assigned one per target.
If the argument is not a numeric value (e.g. "pipe", "disabled", ...)
then incrementing it for the next target has no sense.

Add the option "-gdb-port number" to the commands "target create" and
"$target_name configure" to override, for the specific target, the
general global configuration.

This permits to use a per target "-gdb-port disabled", when no gdb
port is required for that specific target.

It also makes possible to choose a custom TCP port number for each
target, overriding the usual sequence of consecutive port numbers.

Change-Id: I3b9a1910b28ab4bc757e839d0e5d08ffc29f7ab4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4530
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-09-07 08:18:22 +01:00
Christopher Head
45f0c15912 doc: fix typo in cortex_m maskisr command
Change-Id: I37795c320ff7cbf6f2c7434e03b26dbaf6fc6db4
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4621
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-14 04:30:46 +01:00
Masatoshi Tateishi
9ec306e95a rtos: add support for NuttX
This patch introduces RTOS support for NuttX. Currently,
only ARM Cortex-M (both FPU and FPU-less) targets are supported.

To use, add the following lines to ~/.gdbinit.

define hookpost-file
  eval "monitor nuttx.pid_offset %d", &((struct tcb_s *)(0))->pid
  eval "monitor nuttx.xcpreg_offset %d", &((struct tcb_s *)(0))->xcp.regs
  eval "monitor nuttx.state_offset %d", &((struct tcb_s *)(0))->task_state
  eval "monitor nuttx.name_offset %d", &((struct tcb_s *)(0))->name
  eval "monitor nuttx.name_size %d", sizeof(((struct tcb_s *)(0))->name)
end

And please make sure the above values are the same as in
src/rtos/nuttx_header.h

Change-Id: I2aaf8644d24dfb84b500516a9685382d5d8fe48f
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Signed-off-by: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
Signed-off-by: Nobuto Kobayashi <Nobuto.Kobayashi@sony.com>
Reviewed-on: http://openocd.zylin.com/4103
Tested-by: jenkins
Reviewed-by: Alan Carvalho de Assis <acassis@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:33:50 +01:00
Antonio Borneo
6738e447c5 target/arm_adi_v5: add command "dpreg"
For very low level debug or development around DAP, it is useful
to have direct access to DP registers.

Add command "dpreg" by mimic the syntax of the existing "apreg"
command:
	$dap_name dpreg reg [value]

Change-Id: Ic4ab451eb5e74453133adee61050b4c6f656ffa3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4612
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:32:53 +01:00
Antonio Borneo
5e13e01141 server: explicitly call "shutdown" when catch CTRL-C or a signal
Every TCL command can be renamed (or deleted) and then replaced by
a TCL proc that has the same name of the original TCL command.
This can be used either to completely replace an existing command
or to wrap the original command to extend its functionality.
This applies also to the OpenOCD command "shutdown" and can be
useful, for example, to set back some default value to the target
before quitting OpenOCD.
E.g. (TCL code):
	rename shutdown original_shutdown
	proc shutdown {} {
		puts "This is my implementation of shutdown"
		# my own stuff before exit OpenOCD
		original_shutdown
	}

Unfortunately, sending a signal (or pressing CTRL-C) to terminate
OpenOCD doesn't trigger calling the original "shutdown" command
nor its (eventual) replacement.

Detect if the main loop is terminated by an external signal and
in such case execute explicitly the command "shutdown".
Replace with enum the magic numbers assumed by "shutdown_openocd".

Please notice that it's possible to write a custom "shutdown" TCL
proc that does not call the original "shutdown" command. This is
useful, for example, to prevent the user to quit OpenOCD by typing
"shutdown" in the telnet session.
Such case will not prevent OpenOCD to terminate when receiving a
signal; OpenOCD will quit after executing the custom "shutdown"
command.

Change-Id: I86b8f9eab8dbd7a28dad58b8cafd97caa7a82f43
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4551
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-08-01 14:31:37 +01:00
Tim Newsome
a51ab8ddf6 Add RISC-V support.
This supports both 0.11 and 0.13 versions of the debug spec.

Support for `-rtos riscv` will come in a separate commit since it was
easy to separate out, and is likely to be more controversial.

Flash support for the SiFive boards will also come in a later commit.

Change-Id: I1d38fe669c2041b4e21a5c54a091594aac3e2190
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4578
Tested-by: jenkins
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-07-24 13:07:26 +01:00
Edward Fewell
3e84da55a6 flash/nor: add support for TI MSP432 devices
Added msp432 flash driver to support the TI MSP432P4x and
MSP432E4x microcontrollers. Implemented the flash algo
helper as used in the TI debug and flash tools. This
implemention supports the MSP432E4, Falcon, and Falcon 2M
variants. The flash driver automatically detects the
connected variant and configures itself appropriately.
Added command to mass erase device for consistency with
TI tools and added command to unlock the protected BSL
region.

Tested using MSP432E401Y, MSP432P401R, and MSP432P4111
LaunchPads.
Tested with embedded XDS110 debug probe in CMSIS-DAP
mode and with external SEGGER J-Link probe.

Removed ti_msp432p4xx.cfg file made obsolete by this
patch.
Change-Id: I3b29d39ccc492524ef2c4a1733f7f9942c2684c0
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4153
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-07-18 21:09:23 +01:00
Edward Fewell
7b03129916 flash/nor: Add support for TI CC26xx/CC13xx flash
Added cc26xx flash driver to support the TI CC26xx and CC13xx
microcontrollers. Driver is capable of determining which MCU
is connected and configures itself accordingly. Added config
files for four specific variants: CC26x0, CC13x0, CC26x2, and
CC13x2.

Note that the flash loader code is based on the sources used
to support flash in Code Composer Studio and Uniflash from TI.

Removed cc26xx.cfg file made obsolete by this patch.

Change-Id: Ie2b0f74f8af7517a9184704b839677d1c9787862
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4358
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
2018-06-15 20:06:25 +01:00
Andreas Färber
06123153f3 psoc5lp: Add NV Latch flash driver
Erasing is not supported by the hardware, it can be written directly.

Tested on CY8CKIT-059, except modifying-write.

Change-Id: I6e920ed930dcd5c7f0b10c5b1b4791a828d9080a
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3434
Tested-by: jenkins
2018-06-06 18:12:21 +01:00
Andreas Färber
f1427cca3c psoc5lp: Add EEPROM flash driver
Tested on CY8CKIT-059.

Change-Id: Ib02262e8eebf0df3d29492b8a7daa65b262da580
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3433
Tested-by: jenkins
2018-06-06 15:49:14 +01:00
Andreas Färber
2d5f2ede55 flash/nor: Add PSoC 5LP flash driver
Always probe for ECC mode and display ECC sectors if disabled.
Non-ECC write is implemented as zeroing the ECC/config bytes.
Erasing ECC sectors is ignored, erase-checking takes them into account.

Tested with CY8CKIT-059 (CY8C5888), except ECC mode.

Change-Id: If63b9ffca7ad8de038be3c086c49712b629ec554
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/3432
Tested-by: jenkins
2018-06-06 15:48:33 +01:00
Edward Fewell
d02de3a8a9 flash/nor: Add support for TI CC3220SF internal flash
Added cc3220sf flash driver to support the TI CC3220SF
microcontrollers. Implemented flash driver to support the
internal flash of the CC3220SF. The implementation does not
support the serial flash of the CC32xx family that requires
connection over UART, and not via JTAG/SWD debug. Added config
files for both CC32xx devices (no flash) and CC3220SF (with
flash).

Updated to implement comments from code review.
Additional updates to handle remaining comments from review.
Additional updates per review.

Added code to only request aligned writes and full 32-bit
words down to flash helper algorithm. Updated for recent
changes in OpenOCD flash code.

Removed cc32xx.cfg file made obsolete by this patch.
Change-Id: I58fc1478d07238d39c7ef02339f1097a91668c47
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4319
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-06-06 15:38:25 +01:00
Liviu Ionescu
2517bae6c1 Rework/update ARM semihosting
In 2016, ARM released the second edition of the semihosting specs
("Semihosting for AArch32 and AArch64"), adding support for 64-bits.

To ease the reuse of the semihosting logic for other platforms
(like RISC-V), the semihosting code was isolated from the ARM
target and updated to the latest specs.

The new code is already in use since January (in GNU MCU Eclipse
OpenOCD) and no problems were reported, neither for ARM nor for
RISC-V targets, after more than 7K downloads.

The 2 new files were formatted with uncrustify.

Change-Id: Ie84dbd86a547323bb8a5d24eab68fc7dad013d96
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/4518
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-06-04 09:16:08 +01:00
Edward Fewell
2ba27e2f3e jtag/drivers: Add support for TI XDS110 debug probe
Add support for the XDS110 debug probe using the APIs in the
probe's firmware. Includes support for older versions of the
firmware (with reduced performance) and support for a newer
version that includes OpenOCD specific APIs. Tested on various
TI LauchPads including MSP432P4, MSP432E4, CC2650, CC2652, and
CC3220SF.

Updated to add better support for swd switch. Removed issues found with
clang static analysis.

Updated to add rules entry for the XDS110 probe and Tiva DFU mode (which
affects both XDS110 and ICDI probes).

Change-Id: Ib274143111a68e67e80003797c6a68e3e80976b2
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4322
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-31 13:25:16 +01:00
Antonio Borneo
aba11ae6e2 doc: fix several typos in openocd.texi
Mostly trivial fixes spotted by spell checker
One fix s/are/is/
No changes in the content of the document

Change-Id: Ic2d8696860c540e901e8c5190f8f1e7dce80545f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4402
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-26 06:43:18 +01:00
Tomas Vanek
81d0b769a6 target/cortex_m: allow setting the type of a breakpoint
Cortex-M target used 'auto_bp_type' mode. The requested type
of breakpoint was ignored and hard (FPB) breakpoints were set in
'code memory area' 0x00000000-0x1fffffff, soft breakpoints were set above
0x20000000.

The code memory area of Cortex-M does not mean the memory is flash and
vice versa. External flash (parallel or QSPI) is usually mapped above
code memory area. Cortex-M7 ITCM RAM is mapped at 0. Kinetis
has a RAM block under 0x20000000 boundary.

Remove 'auto_bp_type' mode, set breakpoints to requested type.

Change 'cortex_m maskisr auto' handling to use a hard temporary
breakpoint everywhere: it can also workaround not working soft breakpoints
on Cortex-M7 with ICache enabled.

Change-Id: I7a9f9464c5e10bfd7f17cba1037ed07a064fa2e8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4429
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-12 20:49:18 +01:00
Tomas Vanek
414213a5ea target/arm_adi_v5: extend apcsw command to accept arbitrary bits
apcsw command was limited to SPROT bit only.

Now user can manipulate any bit except size and addrinc fields.
Can be used e.g. to set bus signal 'cacheable' on Cortex-M7

Change-Id: Ia1c22b208e46d1653136f6faa5a7aaab036de7aa
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4431
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-07 20:31:37 +01:00
Tim Newsome
2e2bb14b27 Add gdb_report_register_access_error command
With this option enabled (it's disabled by default) errors accessing
registers are returned to gdb. Otherwise they are ignored and success is
reported to gdb. (This is the current behavior.)

We want this for RISC-V, but there's still some cleanup that needs to be
done before that can be upstreamed.

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I7e56109ea52d18b780c14a07fb35f9e6e8979da4
Reviewed-on: http://openocd.zylin.com/4452
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2018-04-07 20:31:14 +01:00
Matthias Welwarsky
0dba1815e6 arm_adi_v5: Add ability to ignore the CSYSPWRUPACK bit
The CTRL/STAT register in the ARM DAP DP has a debug power up
ack bit and a system power up ack bit. Some devices do not set
the system power up ack bit until sometime later. To avoid having
the initial target examination fail due to this or to have a
sticky bit error report claim power failure due to this a user
can now specify that this bit should be ignored.

Change-Id: I2451234bbe904984e29562ef6f616cc6d6f60732
Signed-off-by: Eric Katzfey <eric.katzfey@mentalbee.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3710
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-04-07 20:30:12 +01:00
Stefan Arnold
be87994d60 flash/nor/at91samd: Add "nvmuserrow" command.
Add option "nvmuserrow" to "at91samd" for changing and reading the register at 0x804000 which represents various fuses.

Change-Id: I6382cc4ac15e6b9681e2f30b0ae60397a6289c3b
Signed-off-by: Stefan Arnold <sarnold@sh-sw.de>
Reviewed-on: http://openocd.zylin.com/4260
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-04-06 10:37:31 +01:00
Matthias Welwarsky
2231da8ec4 target: restructure dap support
- add 'dap create' command to create dap instances
- move all dap subcmmand into the dap instance commands
- keep 'dap info' for convenience
- change all armv7 and armv8 targets to take a dap
  instance instead of a jtag chain position
- restructure tap/dap/target relations, jtag tap no
  longer references the dap, daps are now independently
  created and initialized.
- clean up swd connect
- re-initialize DAP also on JTAG errors (e.g. after reset,
  power cycle)
- update documentation
- update target files

Change-Id: I322cf3969b5407c25d1d3962f9d9b9bc1df067d9
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4468
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 09:58:21 +01:00
Matthias Welwarsky
f444c57bf2 arm_cti: add cti command group
Extend the CTI abstraction to be accessible from TCL and
change the 'target' command to accept a cti 'object' instead of a
base address. This also allows accessing CTI instances that are not
related to a configured target.

Change-Id: Iac9ed0edca6f1be00fe93783a35c26077f6bc80a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4031
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 09:48:03 +01:00
Paul Fertser
828ee07657 server: bind to IPv4 localhost by default
Since OpenOCD basically allows to perform arbitrary actions on behalf of
the running user, it makes sense to restrict the exposure by default.

If you need network connectivity and your environment is safe enough,
use "bindto 0.0.0.0" to switch to the old behaviour.

Change-Id: I4a4044b90d0ecb30118cea96fc92a7bcff0924e0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4331
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2018-03-18 12:59:43 +00:00
Paul Fertser
437925c141 doc: fix xref texinfo warning
Change-Id: Iff1ba5836e3a4f352903c3a5ae73c7d992306d42
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4466
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2018-03-15 13:40:53 +00:00
Tomas Vanek
6f700d2b1c doc: make gdb-attach description understandable
Change-Id: I31babf4e3bbe7c94f26818d938699562a4a26d48
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4465
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-03-13 10:55:35 +00:00