2008-02-25 08:01:21 +00:00
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/***************************************************************************
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* Copyright (C) 2006 by Magnus Lundin *
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2008-02-29 12:37:45 +00:00
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* lundin@mlu.mine.nu *
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* *
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2008-09-20 10:50:53 +00:00
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* Copyright (C) 2008 by Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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2008-02-25 08:01:21 +00:00
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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2013-06-02 19:32:36 +00:00
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
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2008-02-25 08:01:21 +00:00
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***************************************************************************/
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/***************************************************************************
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2010-08-01 06:27:14 +00:00
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* STELLARIS flash is tested on LM3S811, LM3S6965, LM3s3748, more.
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2008-02-29 12:37:45 +00:00
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***************************************************************************/
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2012-01-17 16:04:53 +00:00
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2008-02-25 08:01:21 +00:00
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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2012-03-17 07:21:59 +00:00
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#include "jtag/interface.h"
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2009-12-04 22:06:20 +00:00
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#include "imp.h"
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2009-12-03 12:14:35 +00:00
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#include <target/algorithm.h>
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2009-12-04 22:06:20 +00:00
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#include <target/armv7m.h>
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2008-02-25 08:01:21 +00:00
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2009-06-23 22:40:42 +00:00
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#define DID0_VER(did0) ((did0 >> 28)&0x07)
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2009-04-18 10:08:13 +00:00
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2010-11-17 13:12:37 +00:00
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/* STELLARIS control registers */
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#define SCB_BASE 0x400FE000
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#define DID0 0x000
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#define DID1 0x004
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#define DC0 0x008
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#define DC1 0x010
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#define DC2 0x014
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#define DC3 0x018
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#define DC4 0x01C
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#define RIS 0x050
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#define RCC 0x060
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#define PLLCFG 0x064
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#define RCC2 0x070
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#define NVMSTAT 0x1a0
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/* "legacy" flash memory protection registers (64KB max) */
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#define FMPRE 0x130
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#define FMPPE 0x134
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/* new flash memory protection registers (for more than 64KB) */
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#define FMPRE0 0x200 /* PRE1 = PRE0 + 4, etc */
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#define FMPPE0 0x400 /* PPE1 = PPE0 + 4, etc */
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#define USECRL 0x140
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#define FLASH_CONTROL_BASE 0x400FD000
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#define FLASH_FMA (FLASH_CONTROL_BASE | 0x000)
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#define FLASH_FMD (FLASH_CONTROL_BASE | 0x004)
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#define FLASH_FMC (FLASH_CONTROL_BASE | 0x008)
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#define FLASH_CRIS (FLASH_CONTROL_BASE | 0x00C)
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#define FLASH_CIM (FLASH_CONTROL_BASE | 0x010)
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#define FLASH_MISC (FLASH_CONTROL_BASE | 0x014)
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#define AMISC 1
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#define PMISC 2
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#define AMASK 1
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#define PMASK 2
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/* Flash Controller Command bits */
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#define FMC_WRKEY (0xA442 << 16)
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#define FMC_COMT (1 << 3)
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#define FMC_MERASE (1 << 2)
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#define FMC_ERASE (1 << 1)
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#define FMC_WRITE (1 << 0)
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/* STELLARIS constants */
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/* values to write in FMA to commit write-"once" values */
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#define FLASH_FMA_PRE(x) (2 * (x)) /* for FMPPREx */
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#define FLASH_FMA_PPE(x) (2 * (x) + 1) /* for FMPPPEx */
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2009-12-16 22:17:31 +00:00
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static void stellaris_read_clock_info(struct flash_bank *bank);
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2009-11-13 19:32:28 +00:00
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static int stellaris_mass_erase(struct flash_bank *bank);
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2008-02-25 08:01:21 +00:00
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2012-01-31 17:55:03 +00:00
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struct stellaris_flash_bank {
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2010-11-17 13:12:37 +00:00
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/* chip id register */
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uint32_t did0;
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uint32_t did1;
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uint32_t dc0;
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uint32_t dc1;
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2012-01-31 17:55:03 +00:00
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const char *target_name;
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2012-01-17 16:04:53 +00:00
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uint8_t target_class;
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2010-11-17 13:12:37 +00:00
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uint32_t sramsiz;
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uint32_t flshsz;
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/* flash geometry */
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uint32_t num_pages;
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uint32_t pagesize;
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uint32_t pages_in_lockregion;
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/* nv memory bits */
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uint16_t num_lockbits;
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/* main clock status */
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uint32_t rcc;
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uint32_t rcc2;
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uint8_t mck_valid;
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uint8_t xtal_mask;
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uint32_t iosc_freq;
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uint32_t mck_freq;
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const char *iosc_desc;
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const char *mck_desc;
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};
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2012-01-31 17:55:03 +00:00
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/* Autogenerated by contrib/gen-stellaris-part-header.pl */
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2012-09-27 14:55:13 +00:00
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/* From Stellaris Firmware Development Package revision 9453 */
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2009-04-18 10:08:13 +00:00
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static struct {
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2011-11-03 20:42:50 +00:00
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uint8_t class;
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uint8_t partno;
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2010-12-29 21:07:21 +00:00
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const char *partname;
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2011-11-03 20:42:50 +00:00
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} StellarisParts[] = {
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{0x00, 0x01, "LM3S101"},
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{0x00, 0x02, "LM3S102"},
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{0x01, 0xBF, "LM3S1110"},
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{0x01, 0xC3, "LM3S1133"},
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{0x01, 0xC5, "LM3S1138"},
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{0x01, 0xC1, "LM3S1150"},
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{0x01, 0xC4, "LM3S1162"},
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{0x01, 0xC2, "LM3S1165"},
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{0x01, 0xEC, "LM3S1166"},
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{0x01, 0xC6, "LM3S1332"},
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{0x01, 0xBC, "LM3S1435"},
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{0x01, 0xBA, "LM3S1439"},
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{0x01, 0xBB, "LM3S1512"},
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{0x01, 0xC7, "LM3S1538"},
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{0x01, 0xDB, "LM3S1601"},
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{0x03, 0x06, "LM3S1607"},
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{0x01, 0xDA, "LM3S1608"},
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{0x01, 0xC0, "LM3S1620"},
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{0x04, 0xCD, "LM3S1621"},
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{0x03, 0x03, "LM3S1625"},
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{0x03, 0x04, "LM3S1626"},
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{0x03, 0x05, "LM3S1627"},
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{0x01, 0xB3, "LM3S1635"},
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{0x01, 0xEB, "LM3S1636"},
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{0x01, 0xBD, "LM3S1637"},
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{0x04, 0xB1, "LM3S1651"},
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{0x01, 0xB9, "LM3S1751"},
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{0x03, 0x10, "LM3S1776"},
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{0x04, 0x16, "LM3S1811"},
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{0x04, 0x3D, "LM3S1816"},
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{0x01, 0xB4, "LM3S1850"},
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{0x01, 0xDD, "LM3S1911"},
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{0x01, 0xDC, "LM3S1918"},
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{0x01, 0xB7, "LM3S1937"},
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{0x01, 0xBE, "LM3S1958"},
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{0x01, 0xB5, "LM3S1960"},
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{0x01, 0xB8, "LM3S1968"},
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{0x01, 0xEA, "LM3S1969"},
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{0x04, 0xCE, "LM3S1B21"},
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{0x06, 0xCA, "LM3S1C21"},
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{0x06, 0xCB, "LM3S1C26"},
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{0x06, 0x98, "LM3S1C58"},
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{0x06, 0xB0, "LM3S1D21"},
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{0x06, 0xCC, "LM3S1D26"},
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{0x06, 0x1D, "LM3S1F11"},
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{0x06, 0x1B, "LM3S1F16"},
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{0x06, 0xAF, "LM3S1G21"},
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{0x06, 0x95, "LM3S1G58"},
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{0x06, 0x1E, "LM3S1H11"},
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{0x06, 0x1C, "LM3S1H16"},
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{0x04, 0x0F, "LM3S1J11"},
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{0x04, 0x3C, "LM3S1J16"},
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{0x04, 0x0E, "LM3S1N11"},
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{0x04, 0x3B, "LM3S1N16"},
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{0x04, 0xB2, "LM3S1P51"},
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{0x04, 0x9E, "LM3S1R21"},
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{0x04, 0xC9, "LM3S1R26"},
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{0x04, 0x30, "LM3S1W16"},
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{0x04, 0x2F, "LM3S1Z16"},
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{0x01, 0x51, "LM3S2110"},
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{0x01, 0x84, "LM3S2139"},
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{0x03, 0x39, "LM3S2276"},
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{0x01, 0xA2, "LM3S2410"},
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{0x01, 0x59, "LM3S2412"},
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{0x01, 0x56, "LM3S2432"},
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{0x01, 0x5A, "LM3S2533"},
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{0x01, 0xE1, "LM3S2601"},
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{0x01, 0xE0, "LM3S2608"},
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{0x03, 0x33, "LM3S2616"},
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{0x01, 0x57, "LM3S2620"},
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{0x01, 0x85, "LM3S2637"},
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{0x01, 0x53, "LM3S2651"},
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{0x03, 0x80, "LM3S2671"},
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{0x03, 0x50, "LM3S2678"},
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{0x01, 0xA4, "LM3S2730"},
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{0x01, 0x52, "LM3S2739"},
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{0x03, 0x3A, "LM3S2776"},
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{0x04, 0x6D, "LM3S2793"},
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{0x01, 0xE3, "LM3S2911"},
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{0x01, 0xE2, "LM3S2918"},
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{0x01, 0xED, "LM3S2919"},
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{0x01, 0x54, "LM3S2939"},
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{0x01, 0x8F, "LM3S2948"},
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{0x01, 0x58, "LM3S2950"},
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{0x01, 0x55, "LM3S2965"},
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{0x04, 0x6C, "LM3S2B93"},
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{0x06, 0x94, "LM3S2D93"},
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{0x06, 0x93, "LM3S2U93"},
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{0x00, 0x19, "LM3S300"},
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{0x00, 0x11, "LM3S301"},
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{0x00, 0x1A, "LM3S308"},
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{0x00, 0x12, "LM3S310"},
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{0x00, 0x13, "LM3S315"},
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{0x00, 0x14, "LM3S316"},
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{0x00, 0x17, "LM3S317"},
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{0x00, 0x15, "LM3S328"},
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{0x03, 0x08, "LM3S3634"},
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{0x03, 0x43, "LM3S3651"},
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{0x04, 0xC8, "LM3S3654"},
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{0x03, 0x44, "LM3S3739"},
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{0x03, 0x49, "LM3S3748"},
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{0x03, 0x45, "LM3S3749"},
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{0x04, 0x42, "LM3S3826"},
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{0x04, 0x41, "LM3S3J26"},
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{0x04, 0x40, "LM3S3N26"},
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{0x04, 0x3F, "LM3S3W26"},
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{0x04, 0x3E, "LM3S3Z26"},
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{0x03, 0x81, "LM3S5632"},
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{0x04, 0x0C, "LM3S5651"},
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{0x03, 0x8A, "LM3S5652"},
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{0x04, 0x4D, "LM3S5656"},
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{0x03, 0x91, "LM3S5662"},
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{0x03, 0x96, "LM3S5732"},
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{0x03, 0x97, "LM3S5737"},
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{0x03, 0xA0, "LM3S5739"},
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{0x03, 0x99, "LM3S5747"},
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{0x03, 0xA7, "LM3S5749"},
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{0x03, 0x9A, "LM3S5752"},
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{0x03, 0x9C, "LM3S5762"},
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{0x04, 0x69, "LM3S5791"},
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{0x04, 0x0B, "LM3S5951"},
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{0x04, 0x4E, "LM3S5956"},
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{0x04, 0x68, "LM3S5B91"},
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{0x06, 0x2E, "LM3S5C31"},
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{0x06, 0x2C, "LM3S5C36"},
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{0x06, 0x5E, "LM3S5C51"},
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{0x06, 0x5B, "LM3S5C56"},
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{0x06, 0x5F, "LM3S5D51"},
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{0x06, 0x5C, "LM3S5D56"},
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{0x06, 0x87, "LM3S5D91"},
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{0x06, 0x2D, "LM3S5G31"},
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{0x06, 0x1F, "LM3S5G36"},
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{0x06, 0x5D, "LM3S5G51"},
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{0x06, 0x4F, "LM3S5G56"},
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{0x04, 0x09, "LM3S5K31"},
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{0x04, 0x4A, "LM3S5K36"},
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{0x04, 0x0A, "LM3S5P31"},
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{0x04, 0x48, "LM3S5P36"},
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{0x04, 0xB6, "LM3S5P3B"},
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{0x04, 0x0D, "LM3S5P51"},
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{0x04, 0x4C, "LM3S5P56"},
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{0x04, 0x07, "LM3S5R31"},
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{0x04, 0x4B, "LM3S5R36"},
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{0x04, 0x47, "LM3S5T36"},
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{0x06, 0x7F, "LM3S5U91"},
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{0x04, 0x46, "LM3S5Y36"},
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{0x00, 0x2A, "LM3S600"},
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{0x00, 0x21, "LM3S601"},
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{0x00, 0x2B, "LM3S608"},
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{0x00, 0x22, "LM3S610"},
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{0x01, 0xA1, "LM3S6100"},
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{0x00, 0x23, "LM3S611"},
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{0x01, 0x74, "LM3S6110"},
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{0x00, 0x24, "LM3S612"},
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{0x00, 0x25, "LM3S613"},
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{0x00, 0x26, "LM3S615"},
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|
|
{0x00, 0x28, "LM3S617"},
|
|
|
|
{0x00, 0x29, "LM3S618"},
|
|
|
|
{0x00, 0x27, "LM3S628"},
|
|
|
|
{0x01, 0xA5, "LM3S6420"},
|
|
|
|
{0x01, 0x82, "LM3S6422"},
|
|
|
|
{0x01, 0x75, "LM3S6432"},
|
|
|
|
{0x01, 0x76, "LM3S6537"},
|
|
|
|
{0x01, 0x71, "LM3S6610"},
|
|
|
|
{0x01, 0xE7, "LM3S6611"},
|
|
|
|
{0x01, 0xE6, "LM3S6618"},
|
|
|
|
{0x01, 0x83, "LM3S6633"},
|
|
|
|
{0x01, 0x8B, "LM3S6637"},
|
|
|
|
{0x01, 0xA3, "LM3S6730"},
|
|
|
|
{0x01, 0x77, "LM3S6753"},
|
|
|
|
{0x01, 0xE9, "LM3S6911"},
|
|
|
|
{0x01, 0xE8, "LM3S6918"},
|
|
|
|
{0x01, 0x89, "LM3S6938"},
|
|
|
|
{0x01, 0x72, "LM3S6950"},
|
|
|
|
{0x01, 0x78, "LM3S6952"},
|
|
|
|
{0x01, 0x73, "LM3S6965"},
|
|
|
|
{0x06, 0xAA, "LM3S6C11"},
|
|
|
|
{0x06, 0xAC, "LM3S6C65"},
|
|
|
|
{0x06, 0x9F, "LM3S6G11"},
|
|
|
|
{0x06, 0xAB, "LM3S6G65"},
|
|
|
|
{0x00, 0x38, "LM3S800"},
|
|
|
|
{0x00, 0x31, "LM3S801"},
|
|
|
|
{0x00, 0x39, "LM3S808"},
|
|
|
|
{0x00, 0x32, "LM3S811"},
|
|
|
|
{0x00, 0x33, "LM3S812"},
|
|
|
|
{0x00, 0x34, "LM3S815"},
|
|
|
|
{0x00, 0x36, "LM3S817"},
|
|
|
|
{0x00, 0x37, "LM3S818"},
|
|
|
|
{0x00, 0x35, "LM3S828"},
|
|
|
|
{0x01, 0x64, "LM3S8530"},
|
|
|
|
{0x01, 0x8E, "LM3S8538"},
|
|
|
|
{0x01, 0x61, "LM3S8630"},
|
|
|
|
{0x01, 0x63, "LM3S8730"},
|
|
|
|
{0x01, 0x8D, "LM3S8733"},
|
|
|
|
{0x01, 0x86, "LM3S8738"},
|
|
|
|
{0x01, 0x65, "LM3S8930"},
|
|
|
|
{0x01, 0x8C, "LM3S8933"},
|
|
|
|
{0x01, 0x88, "LM3S8938"},
|
|
|
|
{0x01, 0xA6, "LM3S8962"},
|
|
|
|
{0x01, 0x62, "LM3S8970"},
|
|
|
|
{0x01, 0xD7, "LM3S8971"},
|
|
|
|
{0x06, 0xAE, "LM3S8C62"},
|
|
|
|
{0x06, 0xAD, "LM3S8G62"},
|
|
|
|
{0x04, 0xCF, "LM3S9781"},
|
|
|
|
{0x04, 0x67, "LM3S9790"},
|
|
|
|
{0x04, 0x6B, "LM3S9792"},
|
|
|
|
{0x04, 0x2D, "LM3S9971"},
|
|
|
|
{0x04, 0x20, "LM3S9997"},
|
|
|
|
{0x04, 0xD0, "LM3S9B81"},
|
|
|
|
{0x04, 0x66, "LM3S9B90"},
|
|
|
|
{0x04, 0x6A, "LM3S9B92"},
|
|
|
|
{0x04, 0x6E, "LM3S9B95"},
|
|
|
|
{0x04, 0x6F, "LM3S9B96"},
|
|
|
|
{0x04, 0x1D, "LM3S9BN2"},
|
|
|
|
{0x04, 0x1E, "LM3S9BN5"},
|
|
|
|
{0x04, 0x1F, "LM3S9BN6"},
|
|
|
|
{0x06, 0x70, "LM3S9C97"},
|
|
|
|
{0x06, 0xA9, "LM3S9D81"},
|
|
|
|
{0x06, 0x7E, "LM3S9D90"},
|
|
|
|
{0x06, 0x92, "LM3S9D92"},
|
|
|
|
{0x06, 0x9D, "LM3S9D96"},
|
|
|
|
{0x06, 0x7B, "LM3S9DN5"},
|
|
|
|
{0x06, 0x7C, "LM3S9DN6"},
|
|
|
|
{0x06, 0x60, "LM3S9G97"},
|
|
|
|
{0x06, 0x79, "LM3S9GN5"},
|
|
|
|
{0x04, 0x1B, "LM3S9L71"},
|
|
|
|
{0x04, 0x18, "LM3S9L97"},
|
|
|
|
{0x06, 0xA8, "LM3S9U81"},
|
|
|
|
{0x06, 0x7D, "LM3S9U90"},
|
|
|
|
{0x06, 0x90, "LM3S9U92"},
|
|
|
|
{0x06, 0x9B, "LM3S9U96"},
|
|
|
|
{0x05, 0x18, "LM4F110B2QR"},
|
|
|
|
{0x05, 0x19, "LM4F110C4QR"},
|
|
|
|
{0x05, 0x10, "LM4F110E5QR"},
|
|
|
|
{0x05, 0x11, "LM4F110H5QR"},
|
|
|
|
{0x05, 0x22, "LM4F111B2QR"},
|
|
|
|
{0x05, 0x23, "LM4F111C4QR"},
|
|
|
|
{0x05, 0x20, "LM4F111E5QR"},
|
|
|
|
{0x05, 0x21, "LM4F111H5QR"},
|
|
|
|
{0x05, 0x36, "LM4F112C4QC"},
|
|
|
|
{0x05, 0x30, "LM4F112E5QC"},
|
|
|
|
{0x05, 0x31, "LM4F112H5QC"},
|
|
|
|
{0x05, 0x35, "LM4F112H5QD"},
|
|
|
|
{0x05, 0x01, "LM4F120B2QR"},
|
|
|
|
{0x05, 0x02, "LM4F120C4QR"},
|
|
|
|
{0x05, 0x03, "LM4F120E5QR"},
|
|
|
|
{0x05, 0x04, "LM4F120H5QR"},
|
|
|
|
{0x05, 0x08, "LM4F121B2QR"},
|
|
|
|
{0x05, 0x09, "LM4F121C4QR"},
|
|
|
|
{0x05, 0x0A, "LM4F121E5QR"},
|
|
|
|
{0x05, 0x0B, "LM4F121H5QR"},
|
|
|
|
{0x05, 0xD0, "LM4F122C4QC"},
|
|
|
|
{0x05, 0xD1, "LM4F122E5QC"},
|
|
|
|
{0x05, 0xD2, "LM4F122H5QC"},
|
|
|
|
{0x05, 0xD6, "LM4F122H5QD"},
|
|
|
|
{0x05, 0x48, "LM4F130C4QR"},
|
|
|
|
{0x05, 0x40, "LM4F130E5QR"},
|
|
|
|
{0x05, 0x41, "LM4F130H5QR"},
|
|
|
|
{0x05, 0x52, "LM4F131C4QR"},
|
|
|
|
{0x05, 0x50, "LM4F131E5QR"},
|
|
|
|
{0x05, 0x51, "LM4F131H5QR"},
|
|
|
|
{0x05, 0x66, "LM4F132C4QC"},
|
|
|
|
{0x05, 0x60, "LM4F132E5QC"},
|
|
|
|
{0x05, 0x61, "LM4F132H5QC"},
|
|
|
|
{0x05, 0x65, "LM4F132H5QD"},
|
2012-09-27 14:55:13 +00:00
|
|
|
{0x05, 0x70, "LM4F210E5QR"},
|
|
|
|
{0x05, 0x73, "LM4F210H5QR"},
|
|
|
|
{0x05, 0x80, "LM4F211E5QR"},
|
|
|
|
{0x05, 0x83, "LM4F211H5QR"},
|
|
|
|
{0x05, 0xE9, "LM4F212H5BB"},
|
|
|
|
{0x05, 0xC4, "LM4F212H5QC"},
|
|
|
|
{0x05, 0xC6, "LM4F212H5QD"},
|
2011-11-03 20:42:50 +00:00
|
|
|
{0x05, 0xA0, "LM4F230E5QR"},
|
|
|
|
{0x05, 0xA1, "LM4F230H5QR"},
|
|
|
|
{0x05, 0xB0, "LM4F231E5QR"},
|
|
|
|
{0x05, 0xB1, "LM4F231H5QR"},
|
|
|
|
{0x05, 0xC0, "LM4F232E5QC"},
|
|
|
|
{0x05, 0xE3, "LM4F232H5BB"},
|
|
|
|
{0x05, 0xC1, "LM4F232H5QC"},
|
|
|
|
{0x05, 0xC5, "LM4F232H5QD"},
|
|
|
|
{0x05, 0xE5, "LM4FS1AH5BB"},
|
2012-09-27 14:55:13 +00:00
|
|
|
{0x05, 0xEA, "LM4FS1GH5BB"},
|
2011-11-03 20:42:50 +00:00
|
|
|
{0x05, 0xE4, "LM4FS99H5BB"},
|
2012-09-27 14:55:13 +00:00
|
|
|
{0x05, 0xE1, "LM4FSXLH5BB"},
|
2011-11-03 20:42:50 +00:00
|
|
|
{0xFF, 0x00, "Unknown Part"}
|
2008-02-25 08:01:21 +00:00
|
|
|
};
|
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
static char *StellarisClassname[7] = {
|
2008-02-25 08:01:21 +00:00
|
|
|
"Sandstorm",
|
2008-04-30 18:33:21 +00:00
|
|
|
"Fury",
|
|
|
|
"Unknown",
|
|
|
|
"DustDevil",
|
2011-10-17 21:27:49 +00:00
|
|
|
"Tempest",
|
2011-10-31 22:20:06 +00:00
|
|
|
"Blizzard",
|
2011-10-17 21:27:49 +00:00
|
|
|
"Firestorm"
|
2008-02-25 08:01:21 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/***************************************************************************
|
|
|
|
* openocd command interface *
|
|
|
|
***************************************************************************/
|
|
|
|
|
|
|
|
/* flash_bank stellaris <base> <size> 0 0 <target#>
|
|
|
|
*/
|
2009-11-10 09:41:30 +00:00
|
|
|
FLASH_BANK_COMMAND_HANDLER(stellaris_flash_bank_command)
|
2008-02-25 08:01:21 +00:00
|
|
|
{
|
2009-11-13 15:38:55 +00:00
|
|
|
struct stellaris_flash_bank *stellaris_info;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-11-15 12:57:12 +00:00
|
|
|
if (CMD_ARGC < 6)
|
2011-12-16 06:48:39 +00:00
|
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-11-13 15:38:55 +00:00
|
|
|
stellaris_info = calloc(sizeof(struct stellaris_flash_bank), 1);
|
2008-02-25 08:01:21 +00:00
|
|
|
bank->base = 0x0;
|
|
|
|
bank->driver_priv = stellaris_info;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
stellaris_info->target_name = "Unknown target";
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
/* part wasn't probed for info yet */
|
|
|
|
stellaris_info->did1 = 0;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-08-26 06:26:29 +00:00
|
|
|
/* TODO Specify the main crystal speed in kHz using an optional
|
|
|
|
* argument; ditto, the speed of an external oscillator used
|
|
|
|
* instead of a crystal. Avoid programming flash using IOSC.
|
|
|
|
*/
|
2008-02-25 08:01:21 +00:00
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
2010-06-15 21:59:21 +00:00
|
|
|
static int get_stellaris_info(struct flash_bank *bank, char *buf, int buf_size)
|
2008-02-25 08:01:21 +00:00
|
|
|
{
|
2012-01-17 16:04:53 +00:00
|
|
|
int printed;
|
2009-11-13 15:38:55 +00:00
|
|
|
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
if (stellaris_info->did1 == 0)
|
2009-12-16 22:17:31 +00:00
|
|
|
return ERROR_FLASH_BANK_NOT_PROBED;
|
|
|
|
|
|
|
|
/* Read main and master clock freqency register */
|
|
|
|
stellaris_read_clock_info(bank);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-06-23 22:49:23 +00:00
|
|
|
printed = snprintf(buf,
|
2009-06-21 03:20:41 +00:00
|
|
|
buf_size,
|
2009-08-26 06:26:29 +00:00
|
|
|
"\nTI/LMI Stellaris information: Chip is "
|
|
|
|
"class %i (%s) %s rev %c%i\n",
|
2012-01-17 16:04:53 +00:00
|
|
|
stellaris_info->target_class,
|
|
|
|
StellarisClassname[stellaris_info->target_class],
|
2009-06-21 03:20:41 +00:00
|
|
|
stellaris_info->target_name,
|
2009-06-23 22:40:42 +00:00
|
|
|
(int)('A' + ((stellaris_info->did0 >> 8) & 0xFF)),
|
2009-06-21 03:20:41 +00:00
|
|
|
(int)((stellaris_info->did0) & 0xFF));
|
2008-02-25 08:01:21 +00:00
|
|
|
buf += printed;
|
|
|
|
buf_size -= printed;
|
|
|
|
|
2009-06-23 22:49:23 +00:00
|
|
|
printed = snprintf(buf,
|
|
|
|
buf_size,
|
2009-08-26 06:26:29 +00:00
|
|
|
"did1: 0x%8.8" PRIx32 ", arch: 0x%4.4" PRIx32
|
|
|
|
", eproc: %s, ramsize: %ik, flashsize: %ik\n",
|
2009-06-23 22:49:23 +00:00
|
|
|
stellaris_info->did1,
|
|
|
|
stellaris_info->did1,
|
2009-08-26 06:26:29 +00:00
|
|
|
"ARMv7M",
|
2009-06-23 22:44:17 +00:00
|
|
|
(int)((1 + ((stellaris_info->dc0 >> 16) & 0xFFFF))/4),
|
|
|
|
(int)((1 + (stellaris_info->dc0 & 0xFFFF))*2));
|
2008-02-25 08:01:21 +00:00
|
|
|
buf += printed;
|
|
|
|
buf_size -= printed;
|
|
|
|
|
2009-06-23 22:49:23 +00:00
|
|
|
printed = snprintf(buf,
|
2009-06-21 03:20:41 +00:00
|
|
|
buf_size,
|
2009-08-26 06:26:29 +00:00
|
|
|
"master clock: %ikHz%s, "
|
|
|
|
"rcc is 0x%" PRIx32 ", rcc2 is 0x%" PRIx32 "\n",
|
2009-06-23 22:49:23 +00:00
|
|
|
(int)(stellaris_info->mck_freq / 1000),
|
2009-08-26 06:26:29 +00:00
|
|
|
stellaris_info->mck_desc,
|
|
|
|
stellaris_info->rcc,
|
|
|
|
stellaris_info->rcc2);
|
2008-02-25 08:01:21 +00:00
|
|
|
buf += printed;
|
|
|
|
buf_size -= printed;
|
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
if (stellaris_info->num_lockbits > 0) {
|
2011-11-08 16:55:56 +00:00
|
|
|
snprintf(buf,
|
2009-12-10 05:16:09 +00:00
|
|
|
buf_size,
|
|
|
|
"pagesize: %" PRIi32 ", pages: %d, "
|
|
|
|
"lockbits: %i, pages per lockbit: %i\n",
|
|
|
|
stellaris_info->pagesize,
|
|
|
|
(unsigned) stellaris_info->num_pages,
|
|
|
|
stellaris_info->num_lockbits,
|
|
|
|
(unsigned) stellaris_info->pages_in_lockregion);
|
2008-02-25 08:01:21 +00:00
|
|
|
}
|
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/***************************************************************************
|
|
|
|
* chip identification and status *
|
|
|
|
***************************************************************************/
|
|
|
|
|
2009-12-16 22:17:31 +00:00
|
|
|
/* Set the flash timimg register to match current clocking */
|
|
|
|
static void stellaris_set_flash_timing(struct flash_bank *bank)
|
2009-12-10 05:16:09 +00:00
|
|
|
{
|
|
|
|
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
|
|
|
|
struct target *target = bank->target;
|
|
|
|
uint32_t usecrl = (stellaris_info->mck_freq/1000000ul-1);
|
|
|
|
|
2012-01-17 16:05:44 +00:00
|
|
|
/* only valid for Sandstorm and Fury class devices */
|
2012-01-25 14:58:47 +00:00
|
|
|
if (stellaris_info->target_class > 1)
|
2012-01-17 16:05:44 +00:00
|
|
|
return;
|
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
LOG_DEBUG("usecrl = %i", (int)(usecrl));
|
2009-12-10 05:16:09 +00:00
|
|
|
target_write_u32(target, SCB_BASE | USECRL, usecrl);
|
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-08-26 06:26:29 +00:00
|
|
|
static const unsigned rcc_xtal[32] = {
|
|
|
|
[0x00] = 1000000, /* no pll */
|
|
|
|
[0x01] = 1843200, /* no pll */
|
|
|
|
[0x02] = 2000000, /* no pll */
|
|
|
|
[0x03] = 2457600, /* no pll */
|
|
|
|
|
|
|
|
[0x04] = 3579545,
|
|
|
|
[0x05] = 3686400,
|
|
|
|
[0x06] = 4000000, /* usb */
|
|
|
|
[0x07] = 4096000,
|
|
|
|
|
|
|
|
[0x08] = 4915200,
|
|
|
|
[0x09] = 5000000, /* usb */
|
|
|
|
[0x0a] = 5120000,
|
|
|
|
[0x0b] = 6000000, /* (reset) usb */
|
|
|
|
|
|
|
|
[0x0c] = 6144000,
|
|
|
|
[0x0d] = 7372800,
|
|
|
|
[0x0e] = 8000000, /* usb */
|
|
|
|
[0x0f] = 8192000,
|
|
|
|
|
|
|
|
/* parts before DustDevil use just 4 bits for xtal spec */
|
|
|
|
|
|
|
|
[0x10] = 10000000, /* usb */
|
|
|
|
[0x11] = 12000000, /* usb */
|
|
|
|
[0x12] = 12288000,
|
|
|
|
[0x13] = 13560000,
|
|
|
|
|
|
|
|
[0x14] = 14318180,
|
|
|
|
[0x15] = 16000000, /* usb */
|
|
|
|
[0x16] = 16384000,
|
|
|
|
};
|
|
|
|
|
2009-12-10 05:16:09 +00:00
|
|
|
/** Read clock configuration and set stellaris_info->usec_clocks. */
|
2009-11-13 19:32:28 +00:00
|
|
|
static void stellaris_read_clock_info(struct flash_bank *bank)
|
2008-02-25 08:01:21 +00:00
|
|
|
{
|
2009-11-13 15:38:55 +00:00
|
|
|
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
|
2009-11-13 18:11:13 +00:00
|
|
|
struct target *target = bank->target;
|
2009-08-26 06:26:29 +00:00
|
|
|
uint32_t rcc, rcc2, pllcfg, sysdiv, usesysdiv, bypass, oscsrc;
|
|
|
|
unsigned xtal;
|
2008-02-25 08:01:21 +00:00
|
|
|
unsigned long mainfreq;
|
|
|
|
|
2009-06-23 22:45:15 +00:00
|
|
|
target_read_u32(target, SCB_BASE | RCC, &rcc);
|
2009-06-21 03:20:41 +00:00
|
|
|
LOG_DEBUG("Stellaris RCC %" PRIx32 "", rcc);
|
2009-08-26 06:26:29 +00:00
|
|
|
|
|
|
|
target_read_u32(target, SCB_BASE | RCC2, &rcc2);
|
|
|
|
LOG_DEBUG("Stellaris RCC2 %" PRIx32 "", rcc);
|
|
|
|
|
2009-06-23 22:45:15 +00:00
|
|
|
target_read_u32(target, SCB_BASE | PLLCFG, &pllcfg);
|
2009-06-21 03:20:41 +00:00
|
|
|
LOG_DEBUG("Stellaris PLLCFG %" PRIx32 "", pllcfg);
|
2009-08-26 06:26:29 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
stellaris_info->rcc = rcc;
|
2009-08-26 06:26:29 +00:00
|
|
|
stellaris_info->rcc = rcc2;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-06-23 22:40:42 +00:00
|
|
|
sysdiv = (rcc >> 23) & 0xF;
|
|
|
|
usesysdiv = (rcc >> 22) & 0x1;
|
|
|
|
bypass = (rcc >> 11) & 0x1;
|
|
|
|
oscsrc = (rcc >> 4) & 0x3;
|
2009-08-26 06:26:29 +00:00
|
|
|
xtal = (rcc >> 6) & stellaris_info->xtal_mask;
|
|
|
|
|
|
|
|
/* NOTE: post-Sandstorm parts have RCC2 which may override
|
|
|
|
* parts of RCC ... with more sysdiv options, option for
|
|
|
|
* 32768 Hz mainfreq, PLL controls. On Sandstorm it reads
|
|
|
|
* as zero, so the "use RCC2" flag is always clear.
|
|
|
|
*/
|
|
|
|
if (rcc2 & (1 << 31)) {
|
|
|
|
sysdiv = (rcc2 >> 23) & 0x3F;
|
|
|
|
bypass = (rcc2 >> 11) & 0x1;
|
|
|
|
oscsrc = (rcc2 >> 4) & 0x7;
|
|
|
|
|
|
|
|
/* FIXME Tempest parts have an additional lsb for
|
|
|
|
* fractional sysdiv (200 MHz / 2.5 == 80 MHz)
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
|
|
|
|
stellaris_info->mck_desc = "";
|
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
switch (oscsrc) {
|
2009-08-26 06:26:29 +00:00
|
|
|
case 0: /* MOSC */
|
|
|
|
mainfreq = rcc_xtal[xtal];
|
|
|
|
break;
|
|
|
|
case 1: /* IOSC */
|
|
|
|
mainfreq = stellaris_info->iosc_freq;
|
|
|
|
stellaris_info->mck_desc = stellaris_info->iosc_desc;
|
2008-02-25 08:01:21 +00:00
|
|
|
break;
|
2009-08-26 06:26:29 +00:00
|
|
|
case 2: /* IOSC/4 */
|
|
|
|
mainfreq = stellaris_info->iosc_freq / 4;
|
|
|
|
stellaris_info->mck_desc = stellaris_info->iosc_desc;
|
2008-02-25 08:01:21 +00:00
|
|
|
break;
|
2009-08-26 06:26:29 +00:00
|
|
|
case 3: /* lowspeed */
|
|
|
|
/* Sandstorm doesn't have this 30K +/- 30% osc */
|
|
|
|
mainfreq = 30000;
|
|
|
|
stellaris_info->mck_desc = " (±30%)";
|
2008-02-25 08:01:21 +00:00
|
|
|
break;
|
2009-08-26 06:26:29 +00:00
|
|
|
case 8: /* hibernation osc */
|
|
|
|
/* not all parts support hibernation */
|
|
|
|
mainfreq = 32768;
|
2008-02-25 08:01:21 +00:00
|
|
|
break;
|
2008-03-07 16:18:56 +00:00
|
|
|
|
|
|
|
default: /* NOTREACHED */
|
|
|
|
mainfreq = 0;
|
|
|
|
break;
|
2008-02-25 08:01:21 +00:00
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-08-26 06:26:29 +00:00
|
|
|
/* PLL is used if it's not bypassed; its output is 200 MHz
|
|
|
|
* even when it runs at 400 MHz (adds divide-by-two stage).
|
|
|
|
*/
|
2008-02-25 08:01:21 +00:00
|
|
|
if (!bypass)
|
2009-08-26 06:26:29 +00:00
|
|
|
mainfreq = 200000000;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
if (usesysdiv)
|
2009-06-23 22:44:17 +00:00
|
|
|
stellaris_info->mck_freq = mainfreq/(1 + sysdiv);
|
2008-02-25 08:01:21 +00:00
|
|
|
else
|
|
|
|
stellaris_info->mck_freq = mainfreq;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Read device id register, main clock frequency register and fill in driver info structure */
|
2009-11-13 19:32:28 +00:00
|
|
|
static int stellaris_read_part_info(struct flash_bank *bank)
|
2008-02-25 08:01:21 +00:00
|
|
|
{
|
2009-11-13 15:38:55 +00:00
|
|
|
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
|
2009-11-13 18:11:13 +00:00
|
|
|
struct target *target = bank->target;
|
2009-12-16 22:17:31 +00:00
|
|
|
uint32_t did0, did1, ver, fam;
|
2008-02-25 08:01:21 +00:00
|
|
|
int i;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
/* Read and parse chip identification register */
|
2009-06-23 22:45:15 +00:00
|
|
|
target_read_u32(target, SCB_BASE | DID0, &did0);
|
|
|
|
target_read_u32(target, SCB_BASE | DID1, &did1);
|
|
|
|
target_read_u32(target, SCB_BASE | DC0, &stellaris_info->dc0);
|
|
|
|
target_read_u32(target, SCB_BASE | DC1, &stellaris_info->dc1);
|
2009-06-21 03:20:41 +00:00
|
|
|
LOG_DEBUG("did0 0x%" PRIx32 ", did1 0x%" PRIx32 ", dc0 0x%" PRIx32 ", dc1 0x%" PRIx32 "",
|
|
|
|
did0, did1, stellaris_info->dc0, stellaris_info->dc1);
|
2008-02-25 08:01:21 +00:00
|
|
|
|
2008-03-05 13:27:50 +00:00
|
|
|
ver = did0 >> 28;
|
2012-01-31 17:55:03 +00:00
|
|
|
if ((ver != 0) && (ver != 1)) {
|
2008-03-25 15:45:17 +00:00
|
|
|
LOG_WARNING("Unknown did0 version, cannot identify target");
|
2008-04-20 21:37:23 +00:00
|
|
|
return ERROR_FLASH_OPERATION_FAILED;
|
2008-02-25 08:01:21 +00:00
|
|
|
}
|
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
if (did1 == 0) {
|
2008-03-25 15:45:17 +00:00
|
|
|
LOG_WARNING("Cannot identify target as a Stellaris");
|
2008-02-28 10:44:41 +00:00
|
|
|
return ERROR_FLASH_OPERATION_FAILED;
|
|
|
|
}
|
|
|
|
|
2008-03-05 13:27:50 +00:00
|
|
|
ver = did1 >> 28;
|
|
|
|
fam = (did1 >> 24) & 0xF;
|
2012-01-31 17:55:03 +00:00
|
|
|
if (((ver != 0) && (ver != 1)) || (fam != 0)) {
|
2009-12-16 22:17:31 +00:00
|
|
|
LOG_WARNING("Unknown did1 version/family.");
|
|
|
|
return ERROR_FLASH_OPERATION_FAILED;
|
2008-02-25 08:01:21 +00:00
|
|
|
}
|
|
|
|
|
2009-08-26 06:26:29 +00:00
|
|
|
/* For Sandstorm, Fury, DustDevil: current data sheets say IOSC
|
|
|
|
* is 12 MHz, but some older parts have 15 MHz. A few data sheets
|
|
|
|
* even give _both_ numbers! We'll use current numbers; IOSC is
|
|
|
|
* always approximate.
|
|
|
|
*
|
|
|
|
* For Tempest: IOSC is calibrated, 16 MHz
|
2012-01-16 17:36:41 +00:00
|
|
|
* For Blizzard: IOSC is calibrated, 16 MHz
|
|
|
|
* For Firestorm: IOSC is calibrated, 16 MHz
|
2009-08-26 06:26:29 +00:00
|
|
|
*/
|
|
|
|
stellaris_info->iosc_freq = 12000000;
|
|
|
|
stellaris_info->iosc_desc = " (±30%)";
|
|
|
|
stellaris_info->xtal_mask = 0x0f;
|
|
|
|
|
2012-01-17 16:04:53 +00:00
|
|
|
/* get device class */
|
|
|
|
if (DID0_VER(did0) > 0) {
|
|
|
|
stellaris_info->target_class = (did0 >> 16) & 0xFF;
|
|
|
|
} else {
|
|
|
|
/* Sandstorm class */
|
|
|
|
stellaris_info->target_class = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (stellaris_info->target_class) {
|
|
|
|
case 0: /* Sandstorm */
|
|
|
|
/*
|
|
|
|
* Current (2009-August) parts seem to be rev C2 and use 12 MHz.
|
|
|
|
* Parts before rev C0 used 15 MHz; some C0 parts use 15 MHz
|
|
|
|
* (LM3S618), but some other C0 parts are 12 MHz (LM3S811).
|
|
|
|
*/
|
|
|
|
if (((did0 >> 8) & 0xff) < 2) {
|
|
|
|
stellaris_info->iosc_freq = 15000000;
|
|
|
|
stellaris_info->iosc_desc = " (±50%)";
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2009-08-26 06:26:29 +00:00
|
|
|
case 1: /* Fury */
|
|
|
|
break;
|
2012-01-17 16:04:53 +00:00
|
|
|
|
2009-08-26 06:26:29 +00:00
|
|
|
case 4: /* Tempest */
|
2012-01-16 17:36:41 +00:00
|
|
|
case 5: /* Blizzard */
|
|
|
|
case 6: /* Firestorm */
|
2009-08-26 06:26:29 +00:00
|
|
|
stellaris_info->iosc_freq = 16000000; /* +/- 1% */
|
|
|
|
stellaris_info->iosc_desc = " (±1%)";
|
|
|
|
/* FALL THROUGH */
|
2012-01-17 16:04:53 +00:00
|
|
|
|
2009-08-26 06:26:29 +00:00
|
|
|
case 3: /* DustDevil */
|
|
|
|
stellaris_info->xtal_mask = 0x1f;
|
|
|
|
break;
|
2012-01-17 16:04:53 +00:00
|
|
|
|
2009-08-26 06:26:29 +00:00
|
|
|
default:
|
|
|
|
LOG_WARNING("Unknown did0 class");
|
|
|
|
}
|
|
|
|
|
2012-01-17 16:04:53 +00:00
|
|
|
for (i = 0; StellarisParts[i].partno; i++) {
|
2011-11-03 20:42:50 +00:00
|
|
|
if ((StellarisParts[i].partno == ((did1 >> 16) & 0xFF)) &&
|
2012-01-17 16:04:53 +00:00
|
|
|
(StellarisParts[i].class == stellaris_info->target_class))
|
2008-02-25 08:01:21 +00:00
|
|
|
break;
|
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
stellaris_info->target_name = StellarisParts[i].partname;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
stellaris_info->did0 = did0;
|
|
|
|
stellaris_info->did1 = did1;
|
|
|
|
|
2008-05-24 14:49:45 +00:00
|
|
|
stellaris_info->num_lockbits = 1 + (stellaris_info->dc0 & 0xFFFF);
|
2012-01-31 17:55:03 +00:00
|
|
|
stellaris_info->num_pages = 2 * (1 + (stellaris_info->dc0 & 0xFFFF));
|
2008-02-25 08:01:21 +00:00
|
|
|
stellaris_info->pagesize = 1024;
|
|
|
|
stellaris_info->pages_in_lockregion = 2;
|
|
|
|
|
2009-12-16 22:17:31 +00:00
|
|
|
/* REVISIT for at least Tempest parts, read NVMSTAT.FWB too.
|
|
|
|
* That exposes a 32-word Flash Write Buffer ... enabling
|
|
|
|
* writes of more than one word at a time.
|
|
|
|
*/
|
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/***************************************************************************
|
2008-03-05 13:27:50 +00:00
|
|
|
* flash operations *
|
2008-02-25 08:01:21 +00:00
|
|
|
***************************************************************************/
|
|
|
|
|
2009-11-13 19:32:28 +00:00
|
|
|
static int stellaris_protect_check(struct flash_bank *bank)
|
2008-02-25 08:01:21 +00:00
|
|
|
{
|
2009-12-10 05:16:09 +00:00
|
|
|
struct stellaris_flash_bank *stellaris = bank->driver_priv;
|
|
|
|
int status = ERROR_OK;
|
|
|
|
unsigned i;
|
|
|
|
unsigned page;
|
2008-02-25 08:01:21 +00:00
|
|
|
|
2009-12-10 05:16:09 +00:00
|
|
|
if (stellaris->did1 == 0)
|
2009-12-16 22:17:31 +00:00
|
|
|
return ERROR_FLASH_BANK_NOT_PROBED;
|
2008-02-28 10:44:41 +00:00
|
|
|
|
2009-12-10 05:16:09 +00:00
|
|
|
for (i = 0; i < (unsigned) bank->num_sectors; i++)
|
|
|
|
bank->sectors[i].is_protected = -1;
|
2008-02-25 08:01:21 +00:00
|
|
|
|
2009-12-10 05:16:09 +00:00
|
|
|
/* Read each Flash Memory Protection Program Enable (FMPPE) register
|
|
|
|
* to report any pages that we can't write. Ignore the Read Enable
|
|
|
|
* register (FMPRE).
|
|
|
|
*/
|
|
|
|
for (i = 0, page = 0;
|
|
|
|
i < DIV_ROUND_UP(stellaris->num_lockbits, 32u);
|
|
|
|
i++) {
|
|
|
|
uint32_t lockbits;
|
|
|
|
|
|
|
|
status = target_read_u32(bank->target,
|
|
|
|
SCB_BASE + (i ? (FMPPE0 + 4 * i) : FMPPE),
|
|
|
|
&lockbits);
|
2009-12-11 01:42:20 +00:00
|
|
|
LOG_DEBUG("FMPPE%d = %#8.8x (status %d)", i,
|
|
|
|
(unsigned) lockbits, status);
|
2009-12-10 05:16:09 +00:00
|
|
|
if (status != ERROR_OK)
|
|
|
|
goto done;
|
|
|
|
|
|
|
|
for (unsigned j = 0; j < 32; j++) {
|
|
|
|
unsigned k;
|
|
|
|
|
|
|
|
for (k = 0; k < stellaris->pages_in_lockregion; k++) {
|
|
|
|
if (page >= (unsigned) bank->num_sectors)
|
|
|
|
goto done;
|
|
|
|
bank->sectors[page++].is_protected =
|
|
|
|
!(lockbits & (1 << j));
|
|
|
|
}
|
|
|
|
}
|
2008-02-25 08:01:21 +00:00
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-12-10 05:16:09 +00:00
|
|
|
done:
|
|
|
|
return status;
|
2008-02-25 08:01:21 +00:00
|
|
|
}
|
|
|
|
|
2009-11-13 19:32:28 +00:00
|
|
|
static int stellaris_erase(struct flash_bank *bank, int first, int last)
|
2008-02-25 08:01:21 +00:00
|
|
|
{
|
|
|
|
int banknr;
|
2009-06-18 07:10:25 +00:00
|
|
|
uint32_t flash_fmc, flash_cris;
|
2009-11-13 15:38:55 +00:00
|
|
|
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
|
2009-11-13 18:11:13 +00:00
|
|
|
struct target *target = bank->target;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
if (bank->target->state != TARGET_HALTED) {
|
2008-08-17 19:40:17 +00:00
|
|
|
LOG_ERROR("Target not halted");
|
2008-02-28 10:44:41 +00:00
|
|
|
return ERROR_TARGET_NOT_HALTED;
|
|
|
|
}
|
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
if (stellaris_info->did1 == 0)
|
2009-12-16 22:17:31 +00:00
|
|
|
return ERROR_FLASH_BANK_NOT_PROBED;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-04-19 08:16:58 +00:00
|
|
|
if ((first < 0) || (last < first) || (last >= (int)stellaris_info->num_pages))
|
2008-02-25 08:01:21 +00:00
|
|
|
return ERROR_FLASH_SECTOR_INVALID;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-04-19 08:16:58 +00:00
|
|
|
if ((first == 0) && (last == ((int)stellaris_info->num_pages-1)))
|
2008-05-24 14:49:45 +00:00
|
|
|
return stellaris_mass_erase(bank);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-12-16 22:17:31 +00:00
|
|
|
/* Refresh flash controller timing */
|
2009-06-01 03:05:26 +00:00
|
|
|
stellaris_read_clock_info(bank);
|
2009-12-16 22:17:31 +00:00
|
|
|
stellaris_set_flash_timing(bank);
|
2008-02-25 08:01:21 +00:00
|
|
|
|
|
|
|
/* Clear and disable flash programming interrupts */
|
|
|
|
target_write_u32(target, FLASH_CIM, 0);
|
2009-06-23 22:45:15 +00:00
|
|
|
target_write_u32(target, FLASH_MISC, PMISC | AMISC);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-12-16 22:17:31 +00:00
|
|
|
/* REVISIT this clobbers state set by any halted firmware ...
|
|
|
|
* it might want to process those IRQs.
|
|
|
|
*/
|
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
for (banknr = first; banknr <= last; banknr++) {
|
2008-02-25 08:01:21 +00:00
|
|
|
/* Address is first word in page */
|
2008-06-04 09:18:42 +00:00
|
|
|
target_write_u32(target, FLASH_FMA, banknr * stellaris_info->pagesize);
|
2008-02-25 08:01:21 +00:00
|
|
|
/* Write erase command */
|
|
|
|
target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_ERASE);
|
|
|
|
/* Wait until erase complete */
|
2012-01-31 17:55:03 +00:00
|
|
|
do {
|
2008-02-25 08:01:21 +00:00
|
|
|
target_read_u32(target, FLASH_FMC, &flash_fmc);
|
2012-01-31 17:55:03 +00:00
|
|
|
} while (flash_fmc & FMC_ERASE);
|
2008-02-25 08:01:21 +00:00
|
|
|
|
|
|
|
/* Check acess violations */
|
|
|
|
target_read_u32(target, FLASH_CRIS, &flash_cris);
|
2012-01-31 17:55:03 +00:00
|
|
|
if (flash_cris & (AMASK)) {
|
|
|
|
LOG_WARNING("Error erasing flash page %i, flash_cris 0x%" PRIx32 "",
|
|
|
|
banknr, flash_cris);
|
2008-02-25 08:01:21 +00:00
|
|
|
target_write_u32(target, FLASH_CRIS, 0);
|
|
|
|
return ERROR_FLASH_OPERATION_FAILED;
|
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-04-20 21:37:23 +00:00
|
|
|
bank->sectors[banknr].is_erased = 1;
|
2008-02-25 08:01:21 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
2009-11-13 19:32:28 +00:00
|
|
|
static int stellaris_protect(struct flash_bank *bank, int set, int first, int last)
|
2008-02-25 08:01:21 +00:00
|
|
|
{
|
2009-06-18 07:10:25 +00:00
|
|
|
uint32_t fmppe, flash_fmc, flash_cris;
|
2008-02-25 08:01:21 +00:00
|
|
|
int lockregion;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-11-13 15:38:55 +00:00
|
|
|
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
|
2009-11-13 18:11:13 +00:00
|
|
|
struct target *target = bank->target;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
if (bank->target->state != TARGET_HALTED) {
|
2008-08-17 19:40:17 +00:00
|
|
|
LOG_ERROR("Target not halted");
|
2008-02-25 08:01:21 +00:00
|
|
|
return ERROR_TARGET_NOT_HALTED;
|
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
if (!set) {
|
2011-07-10 14:58:31 +00:00
|
|
|
LOG_ERROR("Hardware doesn't support page-level unprotect. "
|
2010-03-03 20:59:53 +00:00
|
|
|
"Try the 'recover' command.");
|
2011-12-28 11:56:08 +00:00
|
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
2009-12-10 05:16:09 +00:00
|
|
|
}
|
|
|
|
|
2009-12-16 22:17:31 +00:00
|
|
|
if (stellaris_info->did1 == 0)
|
|
|
|
return ERROR_FLASH_BANK_NOT_PROBED;
|
|
|
|
|
2009-12-10 05:16:09 +00:00
|
|
|
/* lockregions are 2 pages ... must protect [even..odd] */
|
|
|
|
if ((first < 0) || (first & 1)
|
|
|
|
|| (last < first) || !(last & 1)
|
2012-01-31 17:55:03 +00:00
|
|
|
|| (last >= 2 * stellaris_info->num_lockbits)) {
|
2010-03-03 20:59:53 +00:00
|
|
|
LOG_ERROR("Can't protect unaligned or out-of-range pages.");
|
2008-02-25 08:01:21 +00:00
|
|
|
return ERROR_FLASH_SECTOR_INVALID;
|
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-12-16 22:17:31 +00:00
|
|
|
/* Refresh flash controller timing */
|
2008-04-20 21:37:23 +00:00
|
|
|
stellaris_read_clock_info(bank);
|
2009-12-16 22:17:31 +00:00
|
|
|
stellaris_set_flash_timing(bank);
|
2008-02-25 08:01:21 +00:00
|
|
|
|
2009-12-10 05:16:09 +00:00
|
|
|
/* convert from pages to lockregions */
|
|
|
|
first /= 2;
|
|
|
|
last /= 2;
|
|
|
|
|
|
|
|
/* FIXME this assumes single FMPPE, for a max of 64K of flash!!
|
|
|
|
* Current parts can be much bigger.
|
|
|
|
*/
|
|
|
|
if (last >= 32) {
|
|
|
|
LOG_ERROR("No support yet for protection > 64K");
|
|
|
|
return ERROR_FLASH_OPERATION_FAILED;
|
2008-02-25 08:01:21 +00:00
|
|
|
}
|
|
|
|
|
2009-12-10 05:16:09 +00:00
|
|
|
target_read_u32(target, SCB_BASE | FMPPE, &fmppe);
|
|
|
|
|
|
|
|
for (lockregion = first; lockregion <= last; lockregion++)
|
|
|
|
fmppe &= ~(1 << lockregion);
|
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
/* Clear and disable flash programming interrupts */
|
|
|
|
target_write_u32(target, FLASH_CIM, 0);
|
2009-06-23 22:45:15 +00:00
|
|
|
target_write_u32(target, FLASH_MISC, PMISC | AMISC);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-12-16 22:17:31 +00:00
|
|
|
/* REVISIT this clobbers state set by any halted firmware ...
|
|
|
|
* it might want to process those IRQs.
|
|
|
|
*/
|
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
LOG_DEBUG("fmppe 0x%" PRIx32 "", fmppe);
|
2009-06-23 22:45:15 +00:00
|
|
|
target_write_u32(target, SCB_BASE | FMPPE, fmppe);
|
2009-12-10 05:16:09 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
/* Commit FMPPE */
|
|
|
|
target_write_u32(target, FLASH_FMA, 1);
|
2009-12-10 05:16:09 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
/* Write commit command */
|
2009-12-10 05:16:09 +00:00
|
|
|
/* REVISIT safety check, since this cannot be undone
|
|
|
|
* except by the "Recover a locked device" procedure.
|
2009-12-18 09:33:19 +00:00
|
|
|
* REVISIT DustDevil-A0 parts have an erratum making FMPPE commits
|
|
|
|
* inadvisable ... it makes future mass erase operations fail.
|
2009-12-10 05:16:09 +00:00
|
|
|
*/
|
2011-03-17 02:22:12 +00:00
|
|
|
LOG_WARNING("Flash protection cannot be removed once committed, commit is NOT executed !");
|
2008-02-25 08:01:21 +00:00
|
|
|
/* target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_COMT); */
|
2009-12-10 05:16:09 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
/* Wait until erase complete */
|
2012-01-31 17:55:03 +00:00
|
|
|
do {
|
2008-02-25 08:01:21 +00:00
|
|
|
target_read_u32(target, FLASH_FMC, &flash_fmc);
|
2012-01-31 17:55:03 +00:00
|
|
|
} while (flash_fmc & FMC_COMT);
|
2008-02-25 08:01:21 +00:00
|
|
|
|
|
|
|
/* Check acess violations */
|
|
|
|
target_read_u32(target, FLASH_CRIS, &flash_cris);
|
2012-01-31 17:55:03 +00:00
|
|
|
if (flash_cris & (AMASK)) {
|
2009-06-21 03:20:41 +00:00
|
|
|
LOG_WARNING("Error setting flash page protection, flash_cris 0x%" PRIx32 "", flash_cris);
|
2008-02-25 08:01:21 +00:00
|
|
|
target_write_u32(target, FLASH_CRIS, 0);
|
|
|
|
return ERROR_FLASH_OPERATION_FAILED;
|
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
2010-10-28 09:08:16 +00:00
|
|
|
/* see contib/loaders/flash/stellaris.s for src */
|
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
static const uint8_t stellaris_write_code[] = {
|
2012-02-10 15:27:27 +00:00
|
|
|
/* write: */
|
|
|
|
0xDF, 0xF8, 0x40, 0x40, /* ldr r4, pFLASH_CTRL_BASE */
|
|
|
|
0xDF, 0xF8, 0x40, 0x50, /* ldr r5, FLASHWRITECMD */
|
|
|
|
/* wait_fifo: */
|
|
|
|
0xD0, 0xF8, 0x00, 0x80, /* ldr r8, [r0, #0] */
|
|
|
|
0xB8, 0xF1, 0x00, 0x0F, /* cmp r8, #0 */
|
|
|
|
0x17, 0xD0, /* beq exit */
|
|
|
|
0x47, 0x68, /* ldr r7, [r0, #4] */
|
|
|
|
0x47, 0x45, /* cmp r7, r8 */
|
|
|
|
0xF7, 0xD0, /* beq wait_fifo */
|
|
|
|
/* mainloop: */
|
|
|
|
0x22, 0x60, /* str r2, [r4, #0] */
|
|
|
|
0x02, 0xF1, 0x04, 0x02, /* add r2, r2, #4 */
|
|
|
|
0x57, 0xF8, 0x04, 0x8B, /* ldr r8, [r7], #4 */
|
|
|
|
0xC4, 0xF8, 0x04, 0x80, /* str r8, [r4, #4] */
|
|
|
|
0xA5, 0x60, /* str r5, [r4, #8] */
|
|
|
|
/* busy: */
|
|
|
|
0xD4, 0xF8, 0x08, 0x80, /* ldr r8, [r4, #8] */
|
|
|
|
0x18, 0xF0, 0x01, 0x0F, /* tst r8, #1 */
|
|
|
|
0xFA, 0xD1, /* bne busy */
|
|
|
|
0x8F, 0x42, /* cmp r7, r1 */
|
|
|
|
0x28, 0xBF, /* it cs */
|
|
|
|
0x00, 0xF1, 0x08, 0x07, /* addcs r7, r0, #8 */
|
|
|
|
0x47, 0x60, /* str r7, [r0, #4] */
|
|
|
|
0x01, 0x3B, /* subs r3, r3, #1 */
|
|
|
|
0x03, 0xB1, /* cbz r3, exit */
|
|
|
|
0xE2, 0xE7, /* b wait_fifo */
|
|
|
|
/* exit: */
|
|
|
|
0x00, 0xBE, /* bkpt #0 */
|
|
|
|
|
|
|
|
/* pFLASH_CTRL_BASE: */
|
2012-01-31 17:55:03 +00:00
|
|
|
0x00, 0xD0, 0x0F, 0x40, /* .word 0x400FD000 */
|
2012-02-10 15:27:27 +00:00
|
|
|
/* FLASHWRITECMD: */
|
2012-01-31 17:55:03 +00:00
|
|
|
0x01, 0x00, 0x42, 0xA4 /* .word 0xA4420001 */
|
2008-02-25 08:01:21 +00:00
|
|
|
};
|
2009-12-10 05:16:09 +00:00
|
|
|
static int stellaris_write_block(struct flash_bank *bank,
|
|
|
|
uint8_t *buffer, uint32_t offset, uint32_t wcount)
|
2008-02-25 08:01:21 +00:00
|
|
|
{
|
2009-11-13 18:11:13 +00:00
|
|
|
struct target *target = bank->target;
|
2010-08-24 19:52:04 +00:00
|
|
|
uint32_t buffer_size = 16384;
|
2009-11-13 16:44:30 +00:00
|
|
|
struct working_area *source;
|
|
|
|
struct working_area *write_algorithm;
|
2009-06-18 07:10:25 +00:00
|
|
|
uint32_t address = bank->base + offset;
|
2012-02-10 15:27:27 +00:00
|
|
|
struct reg_param reg_params[4];
|
2009-11-13 16:41:43 +00:00
|
|
|
struct armv7m_algorithm armv7m_info;
|
2008-06-04 09:18:42 +00:00
|
|
|
int retval = ERROR_OK;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-12-18 09:33:19 +00:00
|
|
|
/* power of two, and multiple of word size */
|
2009-12-18 17:59:40 +00:00
|
|
|
static const unsigned buf_min = 128;
|
2009-12-18 09:33:19 +00:00
|
|
|
|
|
|
|
/* for small buffers it's faster not to download an algorithm */
|
2009-12-18 17:59:40 +00:00
|
|
|
if (wcount * 4 < buf_min)
|
2009-12-18 09:33:19 +00:00
|
|
|
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
|
|
|
|
|
2009-06-21 03:20:41 +00:00
|
|
|
LOG_DEBUG("(bank=%p buffer=%p offset=%08" PRIx32 " wcount=%08" PRIx32 "",
|
2008-03-07 16:18:56 +00:00
|
|
|
bank, buffer, offset, wcount);
|
2008-02-25 08:01:21 +00:00
|
|
|
|
|
|
|
/* flash write code */
|
2012-01-31 17:55:03 +00:00
|
|
|
if (target_alloc_working_area(target, sizeof(stellaris_write_code),
|
|
|
|
&write_algorithm) != ERROR_OK) {
|
2009-12-18 09:33:19 +00:00
|
|
|
LOG_DEBUG("no working area for block memory writes");
|
2008-06-04 09:18:42 +00:00
|
|
|
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
|
|
|
|
};
|
2008-02-25 08:01:21 +00:00
|
|
|
|
2009-12-18 09:33:19 +00:00
|
|
|
/* plus a buffer big enough for this data */
|
2009-12-18 17:59:40 +00:00
|
|
|
if (wcount * 4 < buffer_size)
|
|
|
|
buffer_size = wcount * 4;
|
2008-02-25 08:01:21 +00:00
|
|
|
|
|
|
|
/* memory buffer */
|
2012-01-31 17:55:03 +00:00
|
|
|
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
|
2008-02-25 08:01:21 +00:00
|
|
|
buffer_size /= 2;
|
2012-01-31 17:55:03 +00:00
|
|
|
if (buffer_size <= buf_min) {
|
2012-09-30 21:03:44 +00:00
|
|
|
target_free_working_area(target, write_algorithm);
|
2008-02-25 08:01:21 +00:00
|
|
|
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
|
|
|
|
}
|
2009-12-18 09:33:19 +00:00
|
|
|
LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)",
|
|
|
|
target_name(target), (unsigned) buffer_size);
|
2008-02-25 08:01:21 +00:00
|
|
|
};
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-04-24 19:55:51 +00:00
|
|
|
target_write_buffer(target, write_algorithm->address,
|
2009-12-18 09:33:19 +00:00
|
|
|
sizeof(stellaris_write_code),
|
|
|
|
(uint8_t *) stellaris_write_code);
|
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
|
2013-02-01 15:50:20 +00:00
|
|
|
armv7m_info.core_mode = ARM_MODE_THREAD;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
|
|
|
|
init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
|
|
|
|
init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
|
2012-02-10 15:27:27 +00:00
|
|
|
init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-02-10 15:27:27 +00:00
|
|
|
buf_set_u32(reg_params[0].value, 0, 32, source->address);
|
|
|
|
buf_set_u32(reg_params[1].value, 0, 32, source->address + source->size);
|
|
|
|
buf_set_u32(reg_params[2].value, 0, 32, address);
|
|
|
|
buf_set_u32(reg_params[3].value, 0, 32, wcount);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-02-10 15:27:27 +00:00
|
|
|
retval = target_run_flash_async_algorithm(target, buffer, wcount, 4,
|
|
|
|
0, NULL,
|
|
|
|
4, reg_params,
|
|
|
|
source->address, source->size,
|
|
|
|
write_algorithm->address, 0,
|
|
|
|
&armv7m_info);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-02-10 15:27:27 +00:00
|
|
|
if (retval == ERROR_FLASH_OPERATION_FAILED)
|
|
|
|
LOG_ERROR("error %d executing stellaris flash write algorithm", retval);
|
2009-12-18 09:33:19 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
target_free_working_area(target, write_algorithm);
|
|
|
|
target_free_working_area(target, source);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
destroy_reg_param(®_params[0]);
|
|
|
|
destroy_reg_param(®_params[1]);
|
|
|
|
destroy_reg_param(®_params[2]);
|
2012-02-10 15:27:27 +00:00
|
|
|
destroy_reg_param(®_params[3]);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-06-04 09:18:42 +00:00
|
|
|
return retval;
|
2008-02-25 08:01:21 +00:00
|
|
|
}
|
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
static int stellaris_write(struct flash_bank *bank, uint8_t *buffer,
|
|
|
|
uint32_t offset, uint32_t count)
|
2008-02-25 08:01:21 +00:00
|
|
|
{
|
2009-11-13 15:38:55 +00:00
|
|
|
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
|
2009-11-13 18:11:13 +00:00
|
|
|
struct target *target = bank->target;
|
2009-06-18 07:10:25 +00:00
|
|
|
uint32_t address = offset;
|
|
|
|
uint32_t flash_cris, flash_fmc;
|
|
|
|
uint32_t words_remaining = (count / 4);
|
|
|
|
uint32_t bytes_remaining = (count & 0x00000003);
|
|
|
|
uint32_t bytes_written = 0;
|
2009-04-19 08:16:58 +00:00
|
|
|
int retval;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
if (bank->target->state != TARGET_HALTED) {
|
2008-08-17 19:40:17 +00:00
|
|
|
LOG_ERROR("Target not halted");
|
2008-02-28 10:44:41 +00:00
|
|
|
return ERROR_TARGET_NOT_HALTED;
|
|
|
|
}
|
|
|
|
|
2009-06-21 03:20:41 +00:00
|
|
|
LOG_DEBUG("(bank=%p buffer=%p offset=%08" PRIx32 " count=%08" PRIx32 "",
|
2008-03-07 16:18:56 +00:00
|
|
|
bank, buffer, offset, count);
|
2008-02-25 08:01:21 +00:00
|
|
|
|
|
|
|
if (stellaris_info->did1 == 0)
|
2009-12-16 22:17:31 +00:00
|
|
|
return ERROR_FLASH_BANK_NOT_PROBED;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
if (offset & 0x3) {
|
2008-03-25 15:45:17 +00:00
|
|
|
LOG_WARNING("offset size must be word aligned");
|
2008-02-25 08:01:21 +00:00
|
|
|
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
|
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
if (offset + count > bank->size)
|
|
|
|
return ERROR_FLASH_DST_OUT_OF_BANK;
|
|
|
|
|
2009-12-16 22:17:31 +00:00
|
|
|
/* Refresh flash controller timing */
|
2009-06-01 03:05:26 +00:00
|
|
|
stellaris_read_clock_info(bank);
|
2009-12-16 22:17:31 +00:00
|
|
|
stellaris_set_flash_timing(bank);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
/* Clear and disable flash programming interrupts */
|
|
|
|
target_write_u32(target, FLASH_CIM, 0);
|
2009-06-23 22:45:15 +00:00
|
|
|
target_write_u32(target, FLASH_MISC, PMISC | AMISC);
|
2008-02-25 08:01:21 +00:00
|
|
|
|
2009-12-16 22:17:31 +00:00
|
|
|
/* REVISIT this clobbers state set by any halted firmware ...
|
|
|
|
* it might want to process those IRQs.
|
|
|
|
*/
|
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
/* multiple words to be programmed? */
|
2012-01-31 17:55:03 +00:00
|
|
|
if (words_remaining > 0) {
|
2008-02-25 08:01:21 +00:00
|
|
|
/* try using a block write */
|
2009-12-18 09:33:19 +00:00
|
|
|
retval = stellaris_write_block(bank, buffer, offset,
|
|
|
|
words_remaining);
|
2012-01-31 17:55:03 +00:00
|
|
|
if (retval != ERROR_OK) {
|
|
|
|
if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
|
2009-12-18 09:33:19 +00:00
|
|
|
LOG_DEBUG("writing flash word-at-a-time");
|
2012-01-31 17:55:03 +00:00
|
|
|
} else if (retval == ERROR_FLASH_OPERATION_FAILED) {
|
2008-02-25 08:01:21 +00:00
|
|
|
/* if an error occured, we examine the reason, and quit */
|
|
|
|
target_read_u32(target, FLASH_CRIS, &flash_cris);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-06-21 03:20:41 +00:00
|
|
|
LOG_ERROR("flash writing failed with CRIS: 0x%" PRIx32 "", flash_cris);
|
2008-02-25 08:01:21 +00:00
|
|
|
return ERROR_FLASH_OPERATION_FAILED;
|
|
|
|
}
|
2012-01-31 17:55:03 +00:00
|
|
|
} else {
|
2008-11-27 17:19:12 +00:00
|
|
|
buffer += words_remaining * 4;
|
|
|
|
address += words_remaining * 4;
|
|
|
|
words_remaining = 0;
|
2008-02-25 08:01:21 +00:00
|
|
|
}
|
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
while (words_remaining > 0) {
|
2008-06-04 09:18:42 +00:00
|
|
|
if (!(address & 0xff))
|
2009-06-21 03:20:41 +00:00
|
|
|
LOG_DEBUG("0x%" PRIx32 "", address);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
/* Program one word */
|
|
|
|
target_write_u32(target, FLASH_FMA, address);
|
|
|
|
target_write_buffer(target, FLASH_FMD, 4, buffer);
|
|
|
|
target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_WRITE);
|
2008-03-25 15:45:17 +00:00
|
|
|
/* LOG_DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE); */
|
2008-02-25 08:01:21 +00:00
|
|
|
/* Wait until write complete */
|
2012-01-31 17:55:03 +00:00
|
|
|
do {
|
2008-02-25 08:01:21 +00:00
|
|
|
target_read_u32(target, FLASH_FMC, &flash_fmc);
|
2008-11-27 17:19:12 +00:00
|
|
|
} while (flash_fmc & FMC_WRITE);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-02-25 08:01:21 +00:00
|
|
|
buffer += 4;
|
|
|
|
address += 4;
|
2008-11-27 17:19:12 +00:00
|
|
|
words_remaining--;
|
2008-02-25 08:01:21 +00:00
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
if (bytes_remaining) {
|
2009-06-18 07:06:25 +00:00
|
|
|
uint8_t last_word[4] = {0xff, 0xff, 0xff, 0xff};
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-01-10 22:21:30 +00:00
|
|
|
/* copy the last remaining bytes into the write buffer */
|
|
|
|
memcpy(last_word, buffer+bytes_written, bytes_remaining);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-11-27 17:19:12 +00:00
|
|
|
if (!(address & 0xff))
|
2009-06-21 03:20:41 +00:00
|
|
|
LOG_DEBUG("0x%" PRIx32 "", address);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-11-27 17:19:12 +00:00
|
|
|
/* Program one word */
|
|
|
|
target_write_u32(target, FLASH_FMA, address);
|
|
|
|
target_write_buffer(target, FLASH_FMD, 4, last_word);
|
|
|
|
target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_WRITE);
|
|
|
|
/* LOG_DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE); */
|
|
|
|
/* Wait until write complete */
|
2012-01-31 17:55:03 +00:00
|
|
|
do {
|
2008-11-27 17:19:12 +00:00
|
|
|
target_read_u32(target, FLASH_FMC, &flash_fmc);
|
|
|
|
} while (flash_fmc & FMC_WRITE);
|
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-11-27 17:19:12 +00:00
|
|
|
/* Check access violations */
|
2008-02-25 08:01:21 +00:00
|
|
|
target_read_u32(target, FLASH_CRIS, &flash_cris);
|
2012-01-31 17:55:03 +00:00
|
|
|
if (flash_cris & (AMASK)) {
|
2009-06-21 03:20:41 +00:00
|
|
|
LOG_DEBUG("flash_cris 0x%" PRIx32 "", flash_cris);
|
2008-02-25 08:01:21 +00:00
|
|
|
return ERROR_FLASH_OPERATION_FAILED;
|
|
|
|
}
|
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
2009-11-13 19:32:28 +00:00
|
|
|
static int stellaris_probe(struct flash_bank *bank)
|
2008-02-25 08:01:21 +00:00
|
|
|
{
|
2009-12-16 22:17:31 +00:00
|
|
|
struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
|
|
|
|
int retval;
|
|
|
|
|
|
|
|
/* If this is a stellaris chip, it has flash; probe() is just
|
|
|
|
* to figure out how much is present. Only do it once.
|
|
|
|
*/
|
|
|
|
if (stellaris_info->did1 != 0)
|
|
|
|
return ERROR_OK;
|
|
|
|
|
|
|
|
/* stellaris_read_part_info() already handled error checking and
|
|
|
|
* reporting. Note that it doesn't write, so we don't care about
|
|
|
|
* whether the target is halted or not.
|
2008-02-25 08:01:21 +00:00
|
|
|
*/
|
2009-12-16 22:17:31 +00:00
|
|
|
retval = stellaris_read_part_info(bank);
|
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
if (bank->sectors) {
|
2010-05-29 14:43:42 +00:00
|
|
|
free(bank->sectors);
|
|
|
|
bank->sectors = NULL;
|
|
|
|
}
|
|
|
|
|
2009-12-16 22:17:31 +00:00
|
|
|
/* provide this for the benefit of the NOR flash framework */
|
|
|
|
bank->size = 1024 * stellaris_info->num_pages;
|
|
|
|
bank->num_sectors = stellaris_info->num_pages;
|
|
|
|
bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector));
|
2012-01-31 17:55:03 +00:00
|
|
|
for (int i = 0; i < bank->num_sectors; i++) {
|
2009-12-16 22:17:31 +00:00
|
|
|
bank->sectors[i].offset = i * stellaris_info->pagesize;
|
|
|
|
bank->sectors[i].size = stellaris_info->pagesize;
|
|
|
|
bank->sectors[i].is_erased = -1;
|
|
|
|
bank->sectors[i].is_protected = -1;
|
2008-02-25 08:01:21 +00:00
|
|
|
}
|
|
|
|
|
2009-12-16 22:17:31 +00:00
|
|
|
return retval;
|
2008-02-25 08:01:21 +00:00
|
|
|
}
|
2008-05-24 14:49:45 +00:00
|
|
|
|
2009-11-13 19:32:28 +00:00
|
|
|
static int stellaris_mass_erase(struct flash_bank *bank)
|
2008-05-24 14:49:45 +00:00
|
|
|
{
|
2009-11-13 18:11:13 +00:00
|
|
|
struct target *target = NULL;
|
2009-11-13 15:38:55 +00:00
|
|
|
struct stellaris_flash_bank *stellaris_info = NULL;
|
2009-06-18 07:10:25 +00:00
|
|
|
uint32_t flash_fmc;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-05-24 14:49:45 +00:00
|
|
|
stellaris_info = bank->driver_priv;
|
|
|
|
target = bank->target;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
if (target->state != TARGET_HALTED) {
|
2008-08-17 19:40:17 +00:00
|
|
|
LOG_ERROR("Target not halted");
|
2008-05-24 14:49:45 +00:00
|
|
|
return ERROR_TARGET_NOT_HALTED;
|
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-05-24 14:49:45 +00:00
|
|
|
if (stellaris_info->did1 == 0)
|
2009-12-16 22:17:31 +00:00
|
|
|
return ERROR_FLASH_BANK_NOT_PROBED;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-12-16 22:17:31 +00:00
|
|
|
/* Refresh flash controller timing */
|
2009-06-01 03:05:26 +00:00
|
|
|
stellaris_read_clock_info(bank);
|
2009-12-16 22:17:31 +00:00
|
|
|
stellaris_set_flash_timing(bank);
|
2008-05-24 14:49:45 +00:00
|
|
|
|
|
|
|
/* Clear and disable flash programming interrupts */
|
|
|
|
target_write_u32(target, FLASH_CIM, 0);
|
2009-06-23 22:45:15 +00:00
|
|
|
target_write_u32(target, FLASH_MISC, PMISC | AMISC);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-12-16 22:17:31 +00:00
|
|
|
/* REVISIT this clobbers state set by any halted firmware ...
|
|
|
|
* it might want to process those IRQs.
|
|
|
|
*/
|
|
|
|
|
2008-05-24 14:49:45 +00:00
|
|
|
target_write_u32(target, FLASH_FMA, 0);
|
|
|
|
target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
|
|
|
|
/* Wait until erase complete */
|
2012-01-31 17:55:03 +00:00
|
|
|
do {
|
2008-05-24 14:49:45 +00:00
|
|
|
target_read_u32(target, FLASH_FMC, &flash_fmc);
|
2012-01-31 17:55:03 +00:00
|
|
|
} while (flash_fmc & FMC_MERASE);
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-05-24 14:49:45 +00:00
|
|
|
/* if device has > 128k, then second erase cycle is needed
|
|
|
|
* this is only valid for older devices, but will not hurt */
|
2012-01-31 17:55:03 +00:00
|
|
|
if (stellaris_info->num_pages * stellaris_info->pagesize > 0x20000) {
|
2008-05-24 14:49:45 +00:00
|
|
|
target_write_u32(target, FLASH_FMA, 0x20000);
|
|
|
|
target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
|
|
|
|
/* Wait until erase complete */
|
2012-01-31 17:55:03 +00:00
|
|
|
do {
|
2008-05-24 14:49:45 +00:00
|
|
|
target_read_u32(target, FLASH_FMC, &flash_fmc);
|
2012-01-31 17:55:03 +00:00
|
|
|
} while (flash_fmc & FMC_MERASE);
|
2008-05-24 14:49:45 +00:00
|
|
|
}
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-05-24 14:49:45 +00:00
|
|
|
return ERROR_OK;
|
|
|
|
}
|
|
|
|
|
2009-11-10 07:56:52 +00:00
|
|
|
COMMAND_HANDLER(stellaris_handle_mass_erase_command)
|
2008-05-24 14:49:45 +00:00
|
|
|
{
|
|
|
|
int i;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-11-15 12:57:12 +00:00
|
|
|
if (CMD_ARGC < 1)
|
2011-12-16 06:48:39 +00:00
|
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-11-13 19:32:28 +00:00
|
|
|
struct flash_bank *bank;
|
2009-11-17 21:07:36 +00:00
|
|
|
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
2009-10-23 08:40:47 +00:00
|
|
|
if (ERROR_OK != retval)
|
|
|
|
return retval;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2012-01-31 17:55:03 +00:00
|
|
|
if (stellaris_mass_erase(bank) == ERROR_OK) {
|
2008-06-06 09:29:21 +00:00
|
|
|
/* set all sectors as erased */
|
|
|
|
for (i = 0; i < bank->num_sectors; i++)
|
|
|
|
bank->sectors[i].is_erased = 1;
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2009-11-15 13:57:37 +00:00
|
|
|
command_print(CMD_CTX, "stellaris mass erase complete");
|
2012-01-31 17:55:03 +00:00
|
|
|
} else
|
2009-11-15 13:57:37 +00:00
|
|
|
command_print(CMD_CTX, "stellaris mass erase failed");
|
2009-06-01 03:05:26 +00:00
|
|
|
|
2008-05-24 14:49:45 +00:00
|
|
|
return ERROR_OK;
|
|
|
|
}
|
2009-11-09 17:20:33 +00:00
|
|
|
|
2010-02-27 08:31:35 +00:00
|
|
|
/**
|
|
|
|
* Perform the Stellaris "Recovering a 'Locked' Device procedure.
|
|
|
|
* This performs a mass erase and then restores all nonvolatile registers
|
|
|
|
* (including USER_* registers and flash lock bits) to their defaults.
|
|
|
|
* Accordingly, flash can be reprogrammed, and JTAG can be used.
|
|
|
|
*
|
|
|
|
* NOTE that DustDevil parts (at least rev A0 silicon) have errata which
|
|
|
|
* can affect this operation if flash protection has been enabled.
|
|
|
|
*/
|
|
|
|
COMMAND_HANDLER(stellaris_handle_recover_command)
|
|
|
|
{
|
|
|
|
struct flash_bank *bank;
|
|
|
|
int retval;
|
|
|
|
|
|
|
|
retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
|
|
|
if (retval != ERROR_OK)
|
|
|
|
return retval;
|
|
|
|
|
|
|
|
/* REVISIT ... it may be worth sanity checking that the AP is
|
|
|
|
* inactive before we start. ARM documents that switching a DP's
|
|
|
|
* mode while it's active can cause fault modes that need a power
|
|
|
|
* cycle to recover.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* assert SRST */
|
|
|
|
if (!(jtag_get_reset_config() & RESET_HAS_SRST)) {
|
|
|
|
LOG_ERROR("Can't recover Stellaris flash without SRST");
|
|
|
|
return ERROR_FAIL;
|
|
|
|
}
|
2012-03-17 07:21:59 +00:00
|
|
|
adapter_assert_reset();
|
2010-02-27 08:31:35 +00:00
|
|
|
|
|
|
|
for (int i = 0; i < 5; i++) {
|
|
|
|
retval = dap_to_swd(bank->target);
|
|
|
|
if (retval != ERROR_OK)
|
|
|
|
goto done;
|
|
|
|
|
|
|
|
retval = dap_to_jtag(bank->target);
|
|
|
|
if (retval != ERROR_OK)
|
|
|
|
goto done;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* de-assert SRST */
|
2012-03-17 07:21:59 +00:00
|
|
|
adapter_deassert_reset();
|
2010-02-27 08:31:35 +00:00
|
|
|
retval = jtag_execute_queue();
|
|
|
|
|
|
|
|
/* wait 400+ msec ... OK, "1+ second" is simpler */
|
2010-02-28 22:40:23 +00:00
|
|
|
usleep(1000);
|
2010-02-27 08:31:35 +00:00
|
|
|
|
|
|
|
/* USER INTERVENTION required for the power cycle
|
|
|
|
* Restarting OpenOCD is likely needed because of mode switching.
|
|
|
|
*/
|
|
|
|
LOG_INFO("USER ACTION: "
|
|
|
|
"power cycle Stellaris chip, then restart OpenOCD.");
|
|
|
|
|
|
|
|
done:
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
2009-11-22 12:13:56 +00:00
|
|
|
static const struct command_registration stellaris_exec_command_handlers[] = {
|
|
|
|
{
|
|
|
|
.name = "mass_erase",
|
2011-12-16 06:48:39 +00:00
|
|
|
.usage = "<bank>",
|
2010-01-29 21:52:08 +00:00
|
|
|
.handler = stellaris_handle_mass_erase_command,
|
2009-11-22 12:13:56 +00:00
|
|
|
.mode = COMMAND_EXEC,
|
|
|
|
.help = "erase entire device",
|
|
|
|
},
|
2010-02-27 08:31:35 +00:00
|
|
|
{
|
|
|
|
.name = "recover",
|
|
|
|
.handler = stellaris_handle_recover_command,
|
|
|
|
.mode = COMMAND_EXEC,
|
|
|
|
.usage = "bank_id",
|
2010-03-03 20:59:53 +00:00
|
|
|
.help = "recover (and erase) locked device",
|
2010-02-27 08:31:35 +00:00
|
|
|
},
|
2009-11-22 12:13:56 +00:00
|
|
|
COMMAND_REGISTRATION_DONE
|
|
|
|
};
|
|
|
|
static const struct command_registration stellaris_command_handlers[] = {
|
|
|
|
{
|
|
|
|
.name = "stellaris",
|
2010-01-02 23:52:35 +00:00
|
|
|
.mode = COMMAND_EXEC,
|
2009-11-22 12:13:56 +00:00
|
|
|
.help = "Stellaris flash command group",
|
2012-01-09 16:14:18 +00:00
|
|
|
.usage = "",
|
2009-11-22 12:13:56 +00:00
|
|
|
.chain = stellaris_exec_command_handlers,
|
|
|
|
},
|
|
|
|
COMMAND_REGISTRATION_DONE
|
|
|
|
};
|
|
|
|
|
2009-11-13 15:38:01 +00:00
|
|
|
struct flash_driver stellaris_flash = {
|
2009-12-10 05:16:09 +00:00
|
|
|
.name = "stellaris",
|
|
|
|
.commands = stellaris_command_handlers,
|
|
|
|
.flash_bank_command = stellaris_flash_bank_command,
|
|
|
|
.erase = stellaris_erase,
|
|
|
|
.protect = stellaris_protect,
|
|
|
|
.write = stellaris_write,
|
2010-05-11 03:16:33 +00:00
|
|
|
.read = default_flash_read,
|
2009-12-10 05:16:09 +00:00
|
|
|
.probe = stellaris_probe,
|
2009-12-16 22:17:31 +00:00
|
|
|
.auto_probe = stellaris_probe,
|
2012-05-10 09:33:07 +00:00
|
|
|
.erase_check = default_flash_blank_check,
|
2009-12-10 05:16:09 +00:00
|
|
|
.protect_check = stellaris_protect_check,
|
2010-06-15 21:59:21 +00:00
|
|
|
.info = get_stellaris_info,
|
2009-12-10 05:16:09 +00:00
|
|
|
};
|