Commit Graph

22 Commits

Author SHA1 Message Date
Tomas Vanek 8f299c6aec target: consolidate existing target/algo common_magic
Unify common_magic type to unsigned int
Move common_magic to be the first member of the struct
Add unsigned specifier to xxx_COMMON_MAGIC #defines

Change-Id: If961d33232698529514ba3720e04418baf6dc6fe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6996
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-08-14 12:02:38 +00:00
Tomas Vanek b5dd6faf8d target/cortex_a: remove unused CORTEX_A15_COMMON_MAGIC
Change-Id: I7dddc6cb7b0ee8aec7164998f1124b522e899f3d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reported-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7099
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-08-08 19:59:22 +00:00
Antonio Borneo 057e566097 openocd: src/target: replace the GPL-2.0-or-later license tag
Replace the FSF boilerplate with the SPDX tag.

The SPDX tag on files *.c is incorrect, as it should use the C99
single line comment using '//'. But current checkpatch doesn't
allow C99 comments, so keep using standard C comments, by now.

Change-Id: I255ad17235ff1e01bf0aa4deed4d944e1d693ddb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7071
Tested-by: jenkins
2022-07-23 13:58:51 +00:00
Antonio Borneo 67cb50e26a target/arm: rename CamelCase symbols
No major cross dependencies, mostly changes internal to each
file/function.

Change-Id: I3f0879f0f33c6badc36a0dc60229323978a7e280
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6338
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-07-20 14:52:25 +01:00
Marc Schink 076b4d708e target/cortex_a: Use bool data type
Change-Id: Ieea3dc05809263aa0eba5125d52fef3fe77e9c5a
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6289
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-06-13 19:57:25 +01:00
Chengyu Zheng 1fb736f6c5 target/cortex_a: add support for watchpoints
The current implementation of OpenOCD does not support watchpoints for
cortex_a architecture. So, I replaced the add_watchpoint and
remove_watchpoint with the specific implementation for the
cortex a and using the breakpoint implementation and the arm
documentation [1] as reference. In particular, I have made the
following changes:

* added the following functions

- cortex_a_add_watchpoint
  This wrapper function check whether there are any watchpoint
  available on the target device by calling cortex_a_set_watchpoint.

- cortex_a_set_watchpoint
  This function is responsible for settings the watchpoint register
  pair. In particular, it sets the WVR and the WCR registers with
  the cortex_a_dap command.

- cortex_a_remove_watchpoint
  This wrapper function the selected watchpoint on the target device
  by calling cortex_a_unset_watchpoint.

- cortex_a_unset_watchpoint
  This function sets both the WVR and the WCR registers to zero, thus
  unsetting the watchpoint.

[1]
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/BCGDHIEJ.html

Change-Id: I86611dab474cb84836662af572b17636dc68e282
Signed-off-by: Chengyu Zheng <chengyu.zheng@polimi.it>
Reviewed-on: http://openocd.zylin.com/3913
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Marc Schink <dev@zapb.de>
Tested-by: jenkins
2021-06-03 23:26:35 +01:00
Antonio Borneo e63dab0898 target/cortex_a: remove unused code controlled by "fast_reg_read"
The variable fast_reg_read is always zero, causing some code to
never be executed.
Such code try to read the target registers by dumping them in
memory and then reading back the memory through the debugger. But
it is broken due to lack of cache and MMU management.
This code also uses the broken memory_ap access that is going to
be removed soon.

Remove all the code that depends on fast_reg_read not zero.
Add a missing check on arm_dpm_read_current_registers() return.
Keep the unused function cortex_a_dap_write_coreregister_u32()
to balance the used "read" version.

Change-Id: If2ff28a8c49eb0a87dc85207f5431978efd158db
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4746
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-11-06 12:17:48 +00:00
Matthias Welwarsky 0a2f1b29e6 cortex_a: remove partnum magic from arp_examine and dbginit
Depending on the Debug implementation the "OS Lock" feature might be
implemented or not. It is not actually depending on the part number of the
implemented ARM core but on the DBGOSLSR.OSLM bits. This patch removes
querying the part number and implements proper parsing of OSLM. Result is
a more generic approach that will work out-of-box on more devices.

Change-Id: I79e052869c2f9af1d7fdedef42faddb7292e7332
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3213
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2016-12-08 12:25:35 +00:00
Marc Schink d4b7cbff88 Make #include guard naming consistent
Change-Id: Ie13e8af0bb74ed290f811dcad64ad06c9d8cb4fa
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2956
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-24 22:30:55 +01:00
Marc Schink d0e763ac7e Remove FSF address from GPL notices
Also make GPL notices consistent according to:
https://www.gnu.org/licenses/gpl-howto.html

Change-Id: I84c9df40a774958a7ed91460c5d931cfab9f45ba
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3488
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-24 22:30:01 +01:00
Matthias Welwarsky 5bee7f5b2c cortex_a: add 'dacrfixup' to cortex-a command group
work around issues with software breakpoints when the text segment
is mapped read-only by the OS. Set DACR to "all-manager" to bypass
TLB permission checks on memory access.

Change-Id: I79fd9b32b04a4d538d489896470ee30b26b72b30
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3107
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-12-29 21:43:45 +00:00
Andreas Fritiofson dc574aa1da target/arm: Remove usage of struct arm_jtag in ARMv7 targets
The Cortex-A and Cortex-M keeps an arm_jtag struct around just to be
able to pass a pointer to it to one common JTAG function which anyway
only uses the TAP field.

Refactor the function to take a TAP directly, remove the legacy struct
from cortex instances and store the TAP pointer only in the DAP.

Cortex-M makes a call to arm_jtag_setup_connection() with the struct
but the function does nothing useful for a Cortex-M target so remove
the call.

Change-Id: I3b33709ef55372ef14522ed4337e9f2e817ae3ab
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3142
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2015-12-29 20:27:01 +00:00
Evan Hunter 987201c6dc Cortex A/R : Allow interrupt disable during single-step
Example usage:
	cortex_a maskisr on
	cortex_a maskisr off
	cortex_r maskisr on
	cortex_r maskisr off

Change-Id: I799288d9b848a06f561ba29ec1eb8e5eeace5685
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/2876
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2015-11-07 20:36:13 +00:00
Olivier Schonken 6e32887f91 cortex_a: Add Cortex-A5 identification
Add Cortex-A5 identification to ROM-table display, and also
to cortex_a_init_debug_access. This change is mostly cosmetic.

Change-Id: I7b1dd8755d70d45eb5f315aa1918d44a813b3cdf
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/2483
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2015-02-11 16:17:58 +00:00
Alexander Stein 1567caea2c cortex_a: Add support for A7 MPCore
A7 MPCore needs unlocking the debug registers same as with A15 MPCore.
Found out by hacking on the code.

Change-Id: I613cb4fb35007b85b4a9a401577b47768bc1a08b
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Reviewed-on: http://openocd.zylin.com/2344
Tested-by: jenkins
Reviewed-by: Kamal Dasu <kamal.dasu@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-01-10 00:57:09 +00:00
Kamal Dasu e519099ab7 cortex_a: Add support for A15 MPCore
Added Cortex-A15 support for DAP AHB-AP init code as per ADI V5 spec.
Also added changes to make the APB MEM-AP to work with A15.
Made the the cortex_a target code  generic to work with A8, A9
and A15 single core or multicore implementation. Added armv7a code
for os_border calculation to work for known A8, A9 and A15
platforms based on the ARM DDI 0344H, ARM DDI 0407F, ARM DDI 0406C
ARMV7A architecture docs.

Change-Id: Ib2803ab62588bf40f1ae4b9192b619af31525a1a
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1601
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-01-10 00:56:45 +00:00
Kamal Dasu 59c2239bfd cortex_a: target implementation renames cortex_a8 to cortex_a
A previous commit changes the target name used by tcl scripts.
commit d9ba56c295
target: rename cortex_a8 to cortex_a

The current change renames target functions and definitions in the
implementation from cortex_a8 to cortex_a.
This prepares the implementation to support Cortex-A8, A9, A15-MPCore
in one place.

Change-Id: I73b5a38a92c12ba5bd3b806fbbb664817575a6d7
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1599
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-07-03 21:45:04 +00:00
Spencer Oliver 08d4411b59 update files to correct FSF address
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1426
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-06-05 19:52:42 +00:00
Spencer Oliver 374127301e build: cleanup src/target directory
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/430
Tested-by: jenkins
2012-02-06 11:00:36 +00:00
Spencer Oliver 3a550e5b5f cleanup: rename armv4_5 to arm for readability
Nothing more than a name change, just to make reading
the code a bit simpler.

Change-Id: I73a16b7302b48ce07d9688162955aae71d11eb45
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/390
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-23 11:38:26 +00:00
Michel Jaouen 00ded4eb01 armv7a ,cortex a : add L1, L2 cache support, va to pa support 2011-09-30 09:45:26 +02:00
Øyvind Harboe dec80e1cff cortex_a: rename cortex_a8.c/h to cortex_a.c/h
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-22 11:29:10 +01:00