Commit Graph

249 Commits

Author SHA1 Message Date
Øyvind Harboe 53228fbc2e imx31pdk: use rclk w/1MHz fallback
measure_clk indicates ca. 3-4MHz, so 1MHz should be safe.

Added self_test proc used to test that rclk worked.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-10-28 08:43:04 +02:00
Peter Stuge f176278e98 Make systesetreq typos read sysresetreq instead
Signed-off-by: Peter Stuge <peter@stuge.se>
2010-10-25 08:05:23 +02:00
Peter Stuge e7d26173fc Remove srst_pulls_trst from LPC1768 target
srst_pulls_trst may be true on some (broken) LPC1768 boards but is
not true in general for the LPC1768.

Signed-off-by: Peter Stuge <peter@stuge.se>
2010-10-25 08:04:58 +02:00
David Brownell e3773e3e3d swj-dp.tcl (SWD infrastructure #1)
Provide new helper proc that can set up either an SWD or JTAG DAP
based on the transport which is in use -- mostly for SWJ-DP.

 Also update some SWJ-DP based chips/targets to use it.  The goal
is making SWD-vs-JTAG transparent in most places.  SWJ-DP based chips
really need this flexible configuration to cope with debug adapters
that support different transports, without needing new target configs
for each transport or adapter.

For JTAG-DP, callers will use "jtag newtap" directly, as today; only
one chip-level transport option exists.

For SW-DP (e.g. LPC1[13]xx or EFM32, they'll use "swd newdap" directly
(part of an upcoming SWD transport patch).  Again, only one transport
option exists, so hard-wiring is appropriate there.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-10-10 14:41:11 -07:00
Antonio Borneo ecad76061f TCL scripts: fix ocd_mem2array/mem2array
In previous patch, I have introduced again the symbol
"ocd_mem2array", now replaced by "mem2array".
Fix the error.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-09-28 10:44:50 +02:00
Zachary T Welch 3bb4a6ba14 Fix omap3_dbginit to write to physical memory.
Setting the OMAP3530 DBGEN bit must be done in physical memory, so
update omap3_dbginit callback to use the new 'mww phys' command syntax.
2010-09-26 17:45:58 -07:00
Antonio Borneo edefee9880 TCL scripts: collect duplicated procedures
TCL procedures mrw and mmw, originally in DaVinci target code,
are duplicated in other TCL scripts.
Moved in a common helper file, and added help/usage description.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-09-21 12:25:59 +02:00
Øyvind Harboe f613011aa0 tcl: remove incomplete unused tcl file
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-20 09:23:42 +02:00
Karl Kurbjun 60501bb0fb AM/DM37x: Unify configuration scripts and add support for TI Beagleboard xM. 2010-09-20 09:17:28 +02:00
Takács Áron 1b0f194d90 board scripts: Marvell PXA270M processor has a new TAPID: 0x89265013
the new Marvell PXA270M processor has a new TAPID: 0x89265013.
Attached you will find a patch for target/pxa270.cfg that will handle this.

I have also attached a board/colibri.cfg file to support the Colibri
PXA270 module by Toradex.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-14 11:15:35 +02:00
Spencer Oliver 3c69eee9ef cortex m3: add cortex_m3 reset_config cmd
This new cmd adds the ability to choose the Cortex-M3
reset method used.
It defaults to using SRST for reset if available otherwise
it falls back to using NVIC VECTRESET. This is known to work
on all cores.

Move any luminary specific reset handling to the stellaris cfg file.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-08-31 20:09:26 +01:00
Spencer Oliver 31b47688ca cfg: update Luminary config files
- Update all Luminary config's to use a common target/stellaris.cfg.
 - Add Luminary ek-lm3s6965 config.
 - Increase working area for boards with more ram.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-08-31 20:09:24 +01:00
Øyvind Harboe 5c98e063b9 imx35pdk: fix clock and reset delays
Use rclk and 100ms delay on ntrst

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-19 16:06:45 +02:00
Øyvind Harboe 2c4ef30b11 mcb1700: Keil MCB1700 w/1768 config script
Ca. 93kBytes/s flashing speed @ 10MHz JTAG clock

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-17 21:52:39 +02:00
David Brownell 962946ea89 update more Stellaris EK board comments
Using the bundled JTAG/SWD debug support in JTAG mode
is optional on *all* of the EK boards.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-08-16 08:25:37 -04:00
David Brownell 70794664f1 Update comments for some Stellaris EK boards.
These  don't need to use the on-board debuggers in JTAG mode.
Off-board is OK, as would be SWD mode.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-08-16 00:36:52 -04:00
Oleksandr Tymoshenko c54c323cf3 avr32: basic target script 2010-08-15 21:56:41 +02:00
David Brownell d23428a47f at32ap7000 config file
nice board to play with.
2010-08-15 21:54:01 +02:00
Øyvind Harboe f60a2390cc lpc1768: turn down the jtag clock
Tests should that it needs to be as low as 100kHz to be
stable.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-13 12:59:36 +02:00
Piotr Esden-Tempski 52ba344a09 Added Lisa/L script as a target board. 2010-08-13 09:52:31 +02:00
Piotr Esden-Tempski c3ee26d272 Added support for Lisa/L builtin JTAG interface. 2010-08-13 09:52:27 +02:00
Øyvind Harboe a72faf6405 at91cap7a-stk-sdram.cfg: faster reset
crank up JTAG speed as soon as clocks are set up.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-12 15:01:23 +02:00
Thomas Koeller 14a25cd6de DM36x: Set OSCDIV divider
The ability to set up the OSCDIV divider was missing.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-08-12 08:59:04 +02:00
Thomas Koeller 4ed89e4e42 DM36x: Disable unused SYSCLKs
Clear the enable bits for all clocks that are not set explicitly.
This is done to increase robustness by removing pre-existing
state.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-08-12 08:59:03 +02:00
Thomas Koeller 98d2579c61 DM36x: Use enable bit for PLL pre-divider
The PLL pre- and postdividers seem to have enable bits, although
these are not mentioned in the chip documentation.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-08-12 08:59:02 +02:00
Øyvind Harboe 8f779cf66b tcl: remove silly ocd_ prefix to array2mem and mem2array
ocd_ prefix is used internally in OpenOCD as a kludge more
or less to deal with the two kinds of commands that OpenOCD
has.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11 17:24:55 +02:00
Øyvind Harboe f1bd1274ee board: added at91cap7a stk w/sdram config scripts
The strange thing here with this board is that 16MHz kinda
works, but only 2MHz is really stable.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11 17:09:44 +02:00
Øyvind Harboe ba951aede3 config scripts: remove useless reference to OpenOCD docs
clutters config scripts.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11 10:53:54 +02:00
Ben Gardiner 91305bfa7f cfg: add omapl138 support and da850evm preliminary support
This patch adds support for the omapl138 target and preliminary support for the da850evm. The
target cfg file is based on the icepick routing done by the target/ti_dm6446.cfg file.

I have performed limited testing with this setup. I am posting this patch in the interest of
sharing cfg files and in the hopes that the experts on this list can correct errors I have made or
point out enhancements.

The testing I have performed is debugging uboot with gdb where I also use the following local.cfg
and gdbinit files. Debugging appears to work in so much as 'ni' works.

local.cfg:
gdb_memory_map disable

gdbinit:
target remote localhost:3333
set remote hardware-breakpoint-limit 2
set remote hardware-watchpoint-limit 2
monitor poll on

Comments welcome.

Best Regards,
Ben Gardiner
2010-08-10 09:43:30 +02:00
David Brownell 28ddefd065 Luminary-icdi comment update
Clarify that ICDI is the generic logic, but this config is
for the JTAG-only (no-SWD) mode.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-08-03 21:29:05 -04:00
Øyvind Harboe d1638abd6a lpc1768: even if rclk "works", it isn't necessarily the correct clk
rclk = 4MHz oon lpc1768, the correct JTAG clk is 666MHz(4MHz/6).

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-02 13:21:21 +02:00
Peter Stuge 8e9b12dc8a Support NGX Technologies product NGX ARM USB JTAG
This is a standard FT2232 device. More info at their web page:
http://shop.ngxtechnologies.com/product_info.php?cPath=26&products_id=30
2010-08-01 09:10:47 +02:00
Peter Stuge 8772355bbd Remove srst_pulls_trst from LPC2148 target
srst_pulls_trst is only true on some (broken) LPC2148 boards, a fact
which is already documented in doc/openocd.texi, so it shouldn't be
set unconditionally in the target tcl.

This patch was needed to reflash when an Abort exception occured very
early after reset, before OpenOCD tried to halt the CPU.
2010-08-01 09:10:47 +02:00
Øyvind Harboe f4c1f08f16 lpc7168: make flash available upon reset init
set user mode to avoid ROM being mapped at address
0 rather than flash.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-30 22:36:00 +02:00
Spencer Oliver 8dbe367c53 cfg: add Amontec JTAGkey2p interface config (Issue #26)
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-19 17:31:38 +01:00
Spencer Oliver 4611f87f0a flash: add nuc910 nand driver
This adds a nand driver support for the nuc910 target.
Note that ECC is not currently supported by this driver, although
it is supported by the peripheral.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-19 12:22:18 +01:00
Spencer Oliver 8f5e84bf8d cfg: update rsc-w910 script
- Only enable the FMI (NAND) and DMA clocks.
 - Select NAND interface on the MFSEL.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-19 09:10:54 +01:00
David Brownell 2fdc1db304 lm3s811-ek uses generic stellaris target config
There's no point in an lm3s811-specific target file,
so remove it in favor of the generic "stellaris.cfg".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-07-17 02:59:23 -04:00
Spencer Oliver 1619facb5e cfg: add Avalue RSC-W910 config
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-13 14:17:00 +01:00
Olaf Lüke 2986320cde at91sam3s* support
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-25 21:37:53 +02:00
Øyvind Harboe 4fa3cc7746 am3517 evm: use physical write to memory while target is running
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 12:49:56 +02:00
Øyvind Harboe fe1f7f63b6 board: add alpha am3517evm ti board config file
Signs of life: reset(kinda), halt, resume and memory
display/modify.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 08:22:01 +02:00
Thomas Koeller c9e2d13cf9 DM36x: pll & clock setup
Added a function 'pll_v03_setup' to set up PLLs and clock
dividers on DM365 and DM368.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 10:40:05 +02:00
michal smulski bf3410fcc7 arm1136 scripts
Here is a patch to fix a startup in C100 (arm1136). Basically make sure
that UART is configured before using it.

Michal

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 07:39:59 +02:00
Spencer Oliver 94dc7c0a93 cfg: add pic32 virtual banks
make use of the new virtual bank flash driver.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-26 11:10:15 +01:00
Freddie Chopin f1c1bed39a There are no variants of arm7tdmi target
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:40 +01:00
Freddie Chopin e2c9518eda All LPC2xxx chips are little endian and that cannot be changed - update config scripts
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:30 +01:00
Freddie Chopin 9c3b4cfc5d add correct CPUTAPID value for LPC2129
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:18 +01:00
Freddie Chopin 0e4f4bacdc Update "flash bank" helper comments for LPC2xxx chips
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:08 +01:00
Freddie Chopin 06df4664a9 LPC23xx and LPC24xx after reset run on internal 4MHz RC oscillator, so "flash bank" parameter should be 4000 (not 12000)
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:20:43 +01:00