The stlink interface currently does not support 16bit read/writes.
Until a fix is included we issue a error that this is unsupported.
Change-Id: I4552cf2bd3b29e90ecc905325b743c08e2b92d67
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/808
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
In at91sam3.c for Atmel SAM3 flash support, there are arithmetic errors in the functions sam3_page_read() and sam3_page_write().
Address locations are computed incorrectly due to an extra addition operation. This leads to memory locations being skipped during
flash writes and reads.
Smaller programs are written successfully into flash, with memory gaps, while larger programs of legitimate size fail because the
skipped memory is not utilized and therefore unavailable.
The changes address this condition, and have been tested with an Atmel SAM3X-EK evaluation board.
Change-Id: I9ea3b9ed0130b71cbc32b2294e31a6a2bc71b47a
Signed-off-by: Chuen Chou <zhouquan27@gmail.com>
Reviewed-on: http://openocd.zylin.com/806
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
In function pic32mx_write_block() if the parameter
offset is not a multiple of row size the row offset
(offset % row_size) will be ignored by the flash
controller, shifting the code to the beginning of
the row.
Word programming gets it right.
Change-Id: I134913e3d533688f791bbcb0c6e8983524197f3c
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/796
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Offset calculation into buffer was wrong and code would read outside buffer
if count was not a multiple of four.
Change-Id: Ied625b10221423d5a5f25d27ce1edd8c2c3eca8a
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/749
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The number if longwords or "sections" (Freescale term) written for a Kinetis
flash write (4, 8, or 16 bytes depending on the part density/granularity) are
now rounded up to ensure there are no truncations when the desired write is
not a multiple of the minimum write size.
Change-Id: I8db40a8769d8ac5393a46cbf4e5ff0df82faf916
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Reviewed-on: http://openocd.zylin.com/738
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
For example in a pic32mx220, pic32mx unlock don't work
if adapter_khz is set to 5000 or more.
A short delay after asserting reset fix the problem.
Change-Id: I62e493edfcea585c36c8de77a969cebac7227b96
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/790
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Retest the condition when needed, instead of abusing the common_magic
field as a flag. There are only two options here. Either it's an armv7m or
it's another arm. is_arm(...) will return true even for armv7m, so it's
imperative to check in the right order.
Change-Id: Ic227f19f7babf1b0b0fe075f9a3abc4eabc7d5f1
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/779
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
By Initialising the param_table we remove the clang warning's.
We are also make sure we are not passing any rogue values to lpc2000_iap_call.
Change-Id: Idb3b0077d1dae5f03dedab1d46d01140fe9ffb10
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/777
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reorder to allocate all memory after COMMAND_PARSE_NUMBER call.
This removes a clang warning about un-released memory
Change-Id: I8dbeb664a6467077157015bd879bc0aefc5e8614
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/776
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
If the flash class was defined as FC_FLEX_RAM then this would always drop
through to the default handler.
This bug was found by clang, so untested.
Change-Id: I2d9fe6415dd216728a145519400f7b9ef1bd3c3a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/773
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
For odd byte counts, stm32x_write() pads the last byte and writes it using
a discrete 16-bit access. The stlink debugger can't issue 16-bit writes so
it fails for odd byte writes.
This patch changes stm32x_write() to pad odd byte writes into a new buffer
and use the normal code path with a single block write. The fallback path,
when working area cannot be allocated, has to use 16-bit writes though
which means that sufficient working area is required for stlink and odd
byte writes.
Change-Id: I4c5dc456300b6e1056f76b0095be8aceee3e954f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/756
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Remove a lot of the repetitive code in stm32f1x flash probe by converting
the large if-selector to a switch, moving the common checks outside it and
concentrating the failure handling to a single point.
Do the same with stm32f2x and stm32lx for consistency.
Change-Id: Ic0ecfb1533c49f5d2108cda5fd20c8372d7c71ef
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/746
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Some variants read 0 for the flash size register, rather than
failing lets assume we have max flash fitted.
Change-Id: Ie1fb4e73606f49268a6fd5921c3aef75bc4790d3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/744
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Rather than failing if the flash size reg cannot be read lets assume
we have the max flash size fitted.
It is quite common on early ST silicon to not correct support this register.
Change-Id: Ife058d60ae0027faad2c929ebd5b7fe2ef27234d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/743
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Revision X is not mentioned in the latest RM0038 rev5, however it has been
confirmed correct by ST using ST-LINK Utilty.
Change-Id: I65210e512ea25818a1d0d3b223502ebd7535b29d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/742
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
It's unnecessary and prevents reusing this function to fix
option byte writes.
Also try to disable flash writing after an error.
Change-Id: Ib5a7b768a1523e6b8da1555126fef4c1e60ab083
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/479
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
add support for the new stm32f3x family from stmicro:
http://www.st.com/stm32f3
Change-Id: Icd1db95bb2767d9c0ecef24deefa92b4fdaa4f14
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/735
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
New flash description for ATSAM3SD8C used on SAM3S-EK2 development boards. Name used
is "at91sam3sd8c" and chipid is 0x29ab0a60. Mirrors description of other similar parts.
Change-Id: I7fc4b82e7969451645ab067223663f08b76d866b
Signed-off-by: Mike Crowe <mpcrowe@gmail.com>
Reviewed-on: http://openocd.zylin.com/684
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
In the previous iteration, the page counter for erases would not be updated with
the erase size. This patch keeps the page counter synced with the sector counter.
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Change-Id: I95e56a3257b2ad8301c9f28167b842fa6466334f
Reviewed-on: http://openocd.zylin.com/686
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Updates the Kinetis NOR flash support to handle all known block and sector
sizes. Previously only 2kiB sectors were hard-coded, now all four known
combinations non-volatile sector sizes are supported.
The premise of separating Kinetis Program Flash (PFLASH) from FlexNVM is
also introduced. This means each "block" of flash (in Freescale terms) is
treated as a bank in OpenOCD. Correspondingly, the existing board
configuration for the TWR-K60M512 eval system is updated to recognize two
banks instead of one.
A board config for the TWR-K60F120M is also added.
Bank and sector erase and programming has been checked with both of the
mentioned eval boards.
Change-Id: Iae2d10ebf8f548d0a3698df5430bbbe1ccadc58a
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Reviewed-on: http://openocd.zylin.com/663
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Jan Dakinevich <jan.dakinevich@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Use default_flash_blank_check, this will use the much faster
blank_check_memory handler if supported - 15x quicker on stm32f4.
Otherwise it will fall back to using the slower default_flash_mem_blank_check.
Change-Id: Ia231b3e95468c9e92594dbdbe1fa2d69e1506fc3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/632
Tested-by: jenkins
cfi_spansion_write_block() passes an arm_algorithm struct to
target_run_algorithm() which in turn calls armv7m_start_algorithm()
which expect an armv7m_algorithm struct.
As armv7m_algorithm is bigger than arm_algorithm, when
armv7m_start_algorithm() writes in the struct, it overrun the buffer,
writting junk on the stack, which latter on generates a segfault.
This patch ensure we use a properly sized armv7m_algorithm struct
when the target is an armv7m.
Change-Id: I4ab67c15ae4bb72454414a81b92a4231dcdb2239
Signed-off-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-on: http://openocd.zylin.com/623
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
seems 9933fa334d introduce a regression
if the target was anything other than armv4_5 or armv7m.
Just check that we have an arm target.
Change-Id: I67c05138e5be2952ee92e9bfa15e1d050844462a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/615
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
check that the cfi driver supports the current target arch.
Change-Id: I8a95908684de67bf1657d1956f2573662a641cc1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/614
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
This makes the code a bit easier to read as arm_algorithm can
refer to other arch's, not just armv4_5.
Change-Id: I78c99d40f34cda04e06f2daee75b48ff40a1d23d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/613
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The stm32f0 parts use a different address then the rest of the family.
Add a function that returns the correct FLASH_SIZE reg depending on variant.
Change-Id: Idb41580f7162f395b347cec034d6b745847326b7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/601
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The first available devkits for the at91sam3x8h had the ES device populated.
The ES device had an error in the CIDR, specifically in the last byte of
which the upper 3 bits identifies the chip family - cortex-m3, arm7tdmi etc.
The problem was fixed on the ES2 devices - Thanks to Pat Hickey for giving me
the heads-up.
Change-Id: I13dd7fbe0cffaf76f948188c9459dc3cf4435570
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/575
Tested-by: jenkins
Reviewed-by: Jim Norris <u17263@att.net>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Atmel introduced 6 new Cortex-M4 processors on 2011-10-26
SAM4S16C - 1024KB flash LQFP100/BGA100
SAM4S16B - 1024KB flash LQFP64/QFN64
SAM4S16A - 1024KB flash LQFP48/QFN48
SAM4S8C - 512KB flash LQFP100/BGA100
SAM4S8B - 512KB flash LQFP64/QFN64
SAM4S8A - 512KB flash LQFP48/QFN48
The SAM4S processors still suffer from the "6 waitstates needed
to program device" errata.
Other relevant changes are:
1. Address of flash memory starts at 0x400000.
2. EWP (Erase page and write page) only works for the first two 8KB "sectors"
3. Because of the EWP not working for all the sectors, normal page writes have
to be used. The default_flash_blank_check is used to check if lockregions
should be erased.
4. The EA (Erase All) command takes 7.3s to complete. (Previous timeout was
500 ms)
5. There are 128 lockable regions of 8KB each.
Implemented default blank checking, and page erase for load_image scenarios.
This is to compensate for the EWP flash commands only working on the
first 2 8KB sectors.
Change-Id: I7c5a52b177f7849a107611fd0f635fc416cfb724
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/528
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The value returned from target_write_buffer is still ignored.
Change-Id: Icb49d4d1313a5e4f7df68d3f122a5f81cfa0604a
Signed-off-by: Linus Tolke <linus@tigris.org>
Reviewed-on: http://openocd.zylin.com/596
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The target address for the partial data needs to be bumped past the
full page data. Otherwise, the partial data overwrites the start of
the flash block.
Change-Id: I1246b2fa8acbdb8193edcf7029309f11d1c6069c
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/555
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Add swd_init_reset and swd_add_reset.
Add adapter_assert_reset and adapter_deassert_reset, and call them instead
of JTAG reset functions.
Change-Id: Ib2551c6fbb45513e0ae0dc331cfe3ee3f922298a
Signed-off-by: Simon Qian <simonqian.openocd@gmail.com>
Reviewed-on: http://openocd.zylin.com/526
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add a warn message to inform the user that something is wrong
with the flash settings or command parameters.
Change-Id: Ia55868b2abf2a17845e51620b0f29b2809d841c2
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/280
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch fix the slow flash write issue on pflash only devices.
The Family Reference Manual says:
For devices with FlexNVM: FlexRAM
For devices with program flash only: Programming acceleration RAM
So the acceleration RAM is available for the flash section command on
this device.
Change-Id: If6541a23a4457c5ed8858848a145f35cac63138b
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/509
Tested-by: jenkins
Reviewed-by: Tomas Frydrych <tf+openocd@r-finger.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Atmel introduced 7 new Cortex-M3 processors on 2012-02-28
SAM3X4C - 256KB flash
SAM3X4E - 256KB flash
SAM3X8C - 512KB flash
SAM3X8E - 512KB flash
SAM3X8H (Only on dev-kit - not in production...) - 512KB flash
SAM3A4C - 256KB flash
SAM3A8C - 256KB flash
The SAM3X/A processors still suffer from the "6 waitstates needed
to program device" errata.
The CIDR address for the SAM3X/A processors are different from the
other SAM3 processors. Unfortunately, the chip identification register
is not at a constant address across all of the SAM3 series'. As a
consequence, a simple heuristic is used to find where it's
at... If the contents at the first address is zero, then we know
that the second address is where the chip id register is.
We can deduce this because for those SAM's that have the chip id @ 0x400e0940,
the first address, 0x400e0740, is located in the memory map of the Power
Management Controller (PMC). Furthermore, the address is not used by the PMC.
So when read, the memory controller returns zero.
Another interesting change is the flash bank address for flash bank 1.
It is not fixed at 0x00100000 like the Sam3U. Bank 1 of the at91sam3a/x
series starts at 0x00080000 + half the total flash size. Thus for the 256KB
devices Bank 1 is located at 0x000A0000, and for the 512KB devices Bank 1 is
located at 0x000C0000.
The configuration files for the SAM3X/A processors will follow
Change-Id: I6c3a707c00e05d993a2ad1d5a423f23b37ffd553
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/505
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
even the AT91EB40a's flash is covered by CFI and nobody ever submitted
any other drivers based on eCos code. It's just possible that this
idea was missing documentation and "marketing", but it's in git if
somebody wants to resurrect it.
Change-Id: I66449aa6e0997301f9d67f28098789bfc891d6e9
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/502
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
The SUPC (Supply Controller) registers are on different base addresses on different
SAM3 chips:
SAM3U: 0x400e1210
SAM3N: 0x400e1410
SAM3S: 0x400e1410
This creates a problem with the sam3_reg_list array which is const, but would need
to be changed at runtime to account for this variability. As this register is not
used anywhere, it's simplest to just remove it.
Change-Id: I987eb371648d826aa6d5e9de18d38c7bb66d6fca
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/495
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Lock region count and sector sizes did not match datasheet.
(see 6500C-ATARM-8FE11 "SAM3S Series Datasheet", Table 7-1)
Change-Id: Ic511802f96ed03856467a24a6736349205a0576a
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/493
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The assert introduced in 00c8648351 checks
whether the programming offset equals to page_size of the flash, while it
wants to check whether the offset is a multiple of the page_size.
Change-Id: I794d021951a28c1cc520b5eea5d500f097721b06
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/482
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Currently stm32lx flash driver will remove the readout protection if set
during a probe.
This may not be what the user wants, so let them decide.
Change-Id: I8575e3b339b10a4f7bac57cca9586dcab513d347
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/465
Tested-by: jenkins
This enable the stm32f2x flash driver to use the asynchronous
algorithm support.
Speed increase is as follows:
before - wrote 1048576 bytes from file stm32f4x.bin in 30.453804s (33.625 KiB/s)
after - wrote 1048576 bytes from file stm32f4x.bin in 23.679497s (43.244 KiB/s)
This also fixes a bug that was in the old flash loader.
The old loader waited while bit16 of the status reg was 0, the new
loader waits until this bit is 0 as stated in the flash spec.
Bizarrely this bug did not effect programming on any tested parts.
Change-Id: I3efc94d42cbe81283673a8f4203700638080af6e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/460
Tested-by: jenkins
This enable the Stellaris flash driver to use the asynchronous
algorithm support.
Speed increase is as follows:
before - wrote 65536 bytes from file test.bin in 5.486040s (11.666 KiB/s)
after - wrote 65536 bytes from file test.bin in 2.274001s (28.144 KiB/s)
Change-Id: I9004c9aadffa1ae3b0cbf908e6549b5b1f794508
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/403
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Currently the stm32f1x flash driver uses an asynchronous algorithm
as part of the block flash programming. This greatly speeds up flash
programming as the target is always running.
Moving the async code to the target enable other targets to use this
added functionality.
Change-Id: I8e53f094c2ef7848a7f86ddb9a35b6edbfc8454a
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/402
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
I used the CPUID instead of adding a new argument to the flash bank command
Fixed Type in comments
Add the failsafe return value in device_id
Change-Id: Ieb5a46fc002b5390a0c81bc8b49f6c687036ae1d
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-on: http://openocd.zylin.com/438
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The ref manuals for the stm32f2x (RM0033 Rev4) and stm32f4x (RM0090 rev1)
are unclear to the address of the flash size register (F_ID).
According to contacts @ ST this is the correct address, the manuals will be
updated in due coarse.
Change-Id: If9fb83b3100458d17038cf27c2b23355e1dc5a9e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/448
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
This issue was caused by uncrustify not correctly converting the doxygen
comments.
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Change-Id: Ie6dc3b057a08603b670cb27312e5f0d989426e6c
Reviewed-on: http://openocd.zylin.com/431
Tested-by: jenkins
Correct the offset to the read pointer when clearing it on error.
Also restrict the instruction set to armv6-m so the flash driver can be
used on Cortex-M0 parts with the same flash controller.
Change-Id: I380f9dabcc41fb6e4d43a7e02f355e2381913f39
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/399
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
for some reason the following commit was incorrect
769064de4b
Only the Sandstorm and Fury class should write this register.
Change-Id: Ie18f1da6e9b59fb99cca47aa93c7f2fee447ccea
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/400
Tested-by: jenkins
stellaris_set_flash_timing should only be used for Sandstorm and Fury
device classes.
Change-Id: Ib5eff9d954c039f2c5726a8ecc3ee45d1694cfd3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/389
Tested-by: jenkins
read the target class during probe and save for later use.
Change-Id: Ib3ad20edc7d206b7f434bdcc6b947e6a5f06dd1f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/388
Tested-by: jenkins
Nothing more than a name change, just to make reading
the code a bit simpler.
Change-Id: I73a16b7302b48ce07d9688162955aae71d11eb45
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/390
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This makes use of the newly introduced usage field in the flash bank
structure.
Also remove the assertion if usage field is null and
lets print a DEBUG_LOG message instead.
Change-Id: I384bf0e2c444fcc99deef73aec9ef01149a91c76
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/391
Tested-by: jenkins
This allows us to detect a device arrata where the device id returned is
incorrect.
This issue only effects stm32f4x Rev A silicon.
Change-Id: Ic9f4985f9abf562f97322dcf484199f0a4eb01bb
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/354
Tested-by: jenkins
The stm32 drivers have been using 0x7ff as the DEV_ID mask, this should
have been 0xfff.
Change-Id: I232469620969d6dd1b9a2a2aa15ec18b947dbb05
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/352
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
There is no need to use a while loop here. This patch simple copy
the last bytes with the system function.
Change-Id: Ibda72dca449746efeba5a1af2e45c5990f9cf347
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/364
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
add checking of the current flash lock status before performing the unlock sequence (which would fail in an unlocked state)
Change-Id: I693294c9cd2f59e69cb5bf3338120052fd680b1e
Signed-off-by: Bruno FLEURETTE <bruno.fleurette@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/363
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
This uses the same controller as the stm32f2x family.
Change-Id: I931a9ceb0cd1219514d14b8b59475179e543dd0f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/338
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
On wrong parameters a error is signalized to the calling function.
Change-Id: I484443fdb39938e20382edc9246d5ec546a5c960
Signed-off-by: Mathias K <kesmtp@freenet.de>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/282
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Add verification of the flash unlock sequence and return an error if the
flash is still locked.
Add mass erase subcommand.
Change-Id: Id586b1eaf983a3f25b933847dd6608c15bf0b07e
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/281
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
when last==first==0 then mass erase is executed, it's faster.
the page marking was wrong in this case.
Change-Id: I5c579d59b5c4778cf057cb5986e086abdd4209b2
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/232
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
the unlocking procedure erases the flash mem (even if it wasn't locked), so it should be marked as erased after unlocking.
Change-Id: I5cc6a1e1d6cf4e1f243de532eff54111ffd66187
Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com>
Reviewed-on: http://openocd.zylin.com/222
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Don't call a variable num_pages if it holds the flash size. Also rearrange
flash size to num_pages calculation to avoid divide-by-zero if there will
be a device with < 1024 byte pages someday.
Change-Id: I2febea39694a2f9750de141f52ec88ae1599c086
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/211
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
this at least checks the post conditions after convoluted code.
Change-Id: Idfa8cbedce5288d8bae5743687949f141dfb07b2
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/187
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Check whether the destination is in the program flash or NVM regions,
in the former case, use the normal longword mechanism, not the fast NVM
write.
Change-Id: I7366b7c8919928ee690252df83b99701776aee82
Signed-off-by: Tomas Frydrych <tomas@sleepfive.com>
Reviewed-on: http://openocd.zylin.com/194
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Before this commit, openocd used to segfault when probing flash
of an at91sam7x512 (which contains 2 banks of flash). This was due
to the way it systematically insert a new flash bank without setting
its name.
Then, when get_flash_bank_by_name_noprobe() is called, it is doing
a strcmp() on the non-initialized bank->name.
This commit prevents allocation of second probed bank if it is already
allocated (for example, if it is set in a target config file). If a
new bank really needs to be allocated, it ensures that a default name
is set.
Change-Id: I38d15bef1fda2ec746efad37171975136cf7b371
Signed-off-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-on: http://openocd.zylin.com/171
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
* Add flash waitstate support for Atmel SAM3 chips.
* Set default waitstates to 6, to workaround a silicon bug in the SAM3 family
This code has been tested on SAM3U4, SAM3N4 and SAM3N1
based on Change-Id: I477446f9bfb3e910ea3e2414a6e9a75beb14a214
by Jim Norris <u17263@att.net>
Change-Id: I8d360080f6968979ca5e197ad638282cadd18fb7
Signed-off-by: Attila Kinali <attila@kinali.ch>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/128
Tested-by: jenkins
add support for checking target against the device CLASS rather
then just the PARTNO.
This change also adds the new LM4F family (Blizzard).
Change-Id: Ia9d1e33f1f1c2817c0039a2232ecf932fae072f9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/161
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
stick to convention of "retval" being used as error value to
be propagated and use "flash_flags" local variable for flash
flags read from how.
Change-Id: I63f1f2248b4f4538d6cd7634ae277f7c0aadc346
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/178
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
