This patch uses libjaylink which is a library to access J-Link
devices. As other tools which are not in the scope of OpenOCD also
need to access J-Link devices a library is used. A firmware upgrade
tool and an advanced configuration tool for J-Link devices are under
development.
Further versions of libjaylink will support additional features
OpenOCD could benefit from. This includes TCP/IP as additional
possibility to connect to J-Link devices as well as power tracing and
device internal communication. The latter is used to access
peripherals on some development boards (e.g EFM32 STK and DVK).
Integration of libjaylink is realized with a git submodule like
jimtcl. As libjaylink depends on libusb-1.0 only, no additional
dependency is introduced for OpenOCD.
All low-level JTAG and SWD implementations of the current driver are
left untouched and therefore no incompabilities are to be expected.
Improvements of this patch:
* Support for more USB Product IDs, including those with the new
scheme (0x10xx). The corresponding udev rules are also updated.
* Device selection with serial number and USB address.
* Adaptive clocking is now correctly implemented and only usable for
devices with the corresponding capability.
* The target power supply can now be switched without the need for
changing configuration and power cycling the device.
* Device configuration is more restrictive and only allowed if the
required capabilities are available.
* Device configuration now shows the changes between the current
configuration of the device and the values that will be applied.
* Device configuration is verified after it is written to the device
exactly as the vendor software does.
* Connection registration is now handled properly and checks if the
maximum number of connections on a device is reached. This is also
necessary for devices which are attached via USB to OpenOCD as
some device models also support connections on TCP/IP.
* Serial Wire Output (SWO) can now be captured. This feature is not
documented by SEGGER however it is completely supported by
libjaylink.
This patch and libjaylink were tested on Ubuntu 14.04 (i386),
Debian 7 (amd64), FreeBSD 10.0 (amd64) and Windows XP SP3 (32-bit)
with the following device and target configurations:
* JTAG: J-Link v8.0, v9.0 and v9.3 with AT91SAM7S256
* SWD: SiLabs EFM32 STK 3700 (EFM32GG990F1024)
* SWD: J-Link v8.0, v9.0 and v9.3 with EFM32GG990F1024
* SWD: XMC 2Go (XMC1100)
* SWD: XMC1100 Boot Kit (XMC1100)
* SWD: IAR Systems / Olimex Eval Board (LPC1343F)
* SWD: Nordic Semiconductor nRF51 Dongle (nRF51422)
* SWD: SiLabs EZR32 WSTK 6220A (EZR32WG330FG60G)
Except for Windows XP all builds are tested with Clang in addition to
GCC. This patch and libjaylink are not tested on OSX yet.
Change-Id: I8476c57d37c6091c4b892b183da682c548ca1786
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2598
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This adds docs, example config, flash driver.
Driver is only supports K1921VK01T model for now.
Change-Id: I135259bb055dd2df1a17de99f066e2b24eae1b0f
Signed-off-by: Bogdan Kolbov <kolbov@niiet.ru>
Reviewed-on: http://openocd.zylin.com/3011
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This is a complete flash driver for the Infineon XMC4xxx family of
microcontrollers, based on the TMS570 driver by Andrey Yurovsky.
The driver attempts to discover the particular variant of MCU via a
combination of the SCU register (to determine if this is indeed an
XMC4xxx part) and the FLASH0_ID register (to determine the variant).
If this fails, the driver will not load.
The driver has been added to the README and documentation.
Tests:
* Hardware: XMC4500 (XMC4500_relax), XMC4200 (XMC4200 enterprise)
* SWD + JTAG
* Binary: 144k, 1M
Note:
* Flash protect only partly tested. These parts only allow the flash
protection registers (UCB) to be written 4 times total, and my devkits
have run out of uses (more on the way)
Future Work:
* User 1/2(permalock) locking support via custom command
* In-memory flash loader bootstrap (flashing is rather slow...)
Change-Id: I1d3345d5255d8de8dc4175cf987eb4a037a8cf7f
Signed-off-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2488
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Many FPGA board speak JTAG and have a SPI flash for their bitstream
attached to them. The SPI flash is programmed by first uploading a
proxy bitstream to the FPGA that connects the JTAG interface to the
SPI interface if the IR contains a certain USER instruction. Then the
SPI flash can be erase, written, read directly through the JTAG DR.
The JTAG and SPI signaling is compatible. Such a proxy bitstream only
needs to connect TDO-MISO, TDI-MOSI, TCK-CLK, and the activate the
chip select when the IR contains the special instruction and the JTAG
state machine is in the DR-SHIFT state.
Change-Id: Ibc21d793a83b36fa37e2704966aa5c837c4dd0d2
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/2844
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
* Add USB VID and PID for the J-Link interface running on the Nordic
Semiconductor nRF51-DK. Also tested with debug out port to debug
external boards.
* Fixes permissions problems.
Change-Id: I01ffc3150fa2af92d399b50e0195dc255a40ec42
Signed-off-by: Kyle Manna <kyle@kylemanna.com>
Reviewed-on: http://openocd.zylin.com/2774
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Currently itmdump is not a production-quality code hence this hack
seems to be appropriate.
More robust handling is possible with libswo-based swodec tool that's
available from http://git.zapb.de/ .
This adds a new command line option -d N where N is a stimulus number
you want to dump (counting from 1).
The idea here is that if you're interested to live-monitor just a
single stimulus port, you can use this utility directly. If one wants
to demultiplex the TPIU stream, the following is proposed:
1. Use https://gitorious.org/multiplex/multiplex utility that can
accept binary data from a file/pipe/stdin and arbitrary number of TCP
connections. It simply mirrors all the incoming data to all the
accepted connections;
2. Use socat to connect itmdump to the proxy mentioned in 1. and then
either dump the results to separate files or share via their dedicated
TCP ports.
Example script (inspired by http://openocd.zylin.com/#/c/1662/ ,
enables and disables specific itm ports on demand):
for i in `seq 0 31`; do
while true; do
socat -U TCP-LISTEN:$((8000+$i)),reuseaddr \
SYSTEM:"echo itm port $i on | nc -q0 localhost 4444 > /dev/null; nc localhost 7777 | stdbuf -oL itmdump -d$((i+1))"
echo itm port $i off | nc -q0 localhost 4444 > /dev/null
done < /dev/null >&0 2>&0 &
done
Change-Id: Iaeb102436eaa5b106002083f2ffe758fb7bd83e5
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2537
Tested-by: jenkins
Run-time tested with FreeRTOS V8.1.2 (current version).
For the time being I propose this way of dealing with RTOSes that do
not export necessary information on their own.
I also suggest implementing a similar scheme for ChibiOS, exporting
the necessary struct fields' offsets via an OpenOCD-specific helper.
Change-Id: Iacf8b88004d62206215fe80011fd7592438446a3
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2347
Tested-by: jenkins
This is a new driver for Silicon Laboratories SiM3 microcontroller
family, based on the work of Ladislav Bábel. The driver will try to
detect the type of MCU from the device id register, and if this
fails it will use the flash size from the flash bank command.
Driver added to the documentation and to the README.
TCL script added.
Tests:
* Hardware: SiM3C166 (pre-production) and SiM3U167
* Binary: 4kb, 197kb, 256kb
* Flash protect not tested
Change-Id: I701e0cf505ca8ad99be7f83543fe5055b2f65dcc
Signed-off-by: Andreas Bomholtz <andreas@seluxit.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2078
Tested-by: jenkins
After SPI flash was written by the assembly language stub,
the last SPI command was not terminated by raising CS.
This left the SPI device in a hung state that prevented the
flash from being read by the M4 SPIFI controller, even after
the M4 was fully reset. To access the flash via SPIFI, it was
necessary to completely power cycle the board.
This fix adds the missing instructions to raise CS and
terminate the SPI command after the last byte. This allows
the M4 to be resumed or reset cleanly after flashing. The
SPIFI memory is now immediately accessable at address
0x1400 0000 after flashing is complete.
Change-Id: I4d5e03bded0fa00c430c2991f182dc18611d5f48
Signed-off-by: Anders <anders@openpuma.org>
Reviewed-on: http://openocd.zylin.com/2359
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds support for QSPI flash controller driver for
Marvell's Wireless Microcontroller platform.
For more information please refer,
https://origin-www.marvell.com/microcontrollers/wi-fi-microcontroller-platform/
Following things have been tested on 88MC200 (Winbond W25Q80BV flash chip):
1. Flash sector level erase
2. Flash chip erase
3. Flash write in normal SPI mode
4. Flash fill (write and verify) in normal SPI mode
Change-Id: If4414ae3f77ff170b84e426a35b66c44590c5e06
Signed-off-by: Mahavir Jain <mjain@marvell.com>
Reviewed-on: http://openocd.zylin.com/2280
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Halt, resume, memory read/write are used in various ways.
Change-Id: Ia6727678bfc19cc764f822b739bddaae56e9dc70
Signed-off-by: Andreas Ortmann <ortmann@finf.uni-hannover.de>
Reviewed-on: http://openocd.zylin.com/2000
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Since the standard requires to have "CMSIS-DAP" somewhere in product
string, use that to automatically match all the compliant adapters.
Change-Id: I1e2ac088333a7d69a136af825248914339debdd8
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2082
Tested-by: jenkins
Reviewed-by: Jörg Wunsch <openocd@uriah.heep.sax.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
It looks like tools/ should be used only for build tools, and contrib/
is a suitable place for everything else.
Change-Id: Iddaebba0acb6d66404912ec96749b46e4be643d8
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1906
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
The JLink-OB (onboard) devices work the same way as the normal JLink
except that their PID is 0x0105 (and that's the only one we know of so
far) and their endpoint addresses are different due to there being a
CDC-ACM interface as well. These JLink-OB devices show up on a lot of
vendors' development kits as an integrated debugger.
This change simply checks whether the adapter we opened has a JLink-OB
PID and, if it does, uses the JLink-OB endpoints rather than the
default. To do this, we add a new routine, jtag_libusb_get_pid() to the
libusb adapter layer, it in turn just calls
libusb_get_device_descriptor(), which previously had no wrapper.
Also, checkpatch.pl doesn't like the VID/PID macros as defined so I
moved them to the array itself. This should have no effect on the code.
This change adds the 0102 through 0104 PIDs to openocd.rules as well as this
new 0105 PID.
Tested on an Atmel SAM4S Xplained board which has a JLink-OB, also
regression tested by using a 0x0101 PID normal JLink adapter.
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Change-Id: I121d30e57729cda3adb66e2a5dc72e1fcb7ef8b1
Reviewed-on: http://openocd.zylin.com/2031
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This should provide enough information to start using OpenOCD RPC.
I've seen some other example clients in different languages but I
can't find them anymore, and their legal status was unclear.
Change-Id: I3a95fe361d773040d1e52a62f9cc0cc655019a9f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1915
Tested-by: jenkins
Reviewed-by: Andreas Ortmann <ortmann@finf.uni-hannover.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Also add missing entries for JTAG-lock-pick Tiny 2, Xverve Signalyzer
LITE and default FTDI VID:PIDs.
Change-Id: I41b4f15409642298d1cf134d1f8014dc8f003005
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1969
Tested-by: jenkins
TUMPA Lite is a cheap FT232H-based breakout board, without any
buffering. It also lacks series resistors so for some targets
(especially when not using ridiculously short wires) one needs to add
about 47 Ohms in series on every high-speed line.
The SRST line is connected directly to the FT232H too.
Real-life tested (including SRST and TRST).
Change-Id: I5ed4f88d8d20384e9c52efe2ff0c290e2650d43e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1918
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
These kits feature a CMSIS-DAP compliant debugger and so have been added
as part of the pending support.
Currently the flash drivers for the L8 and D20 are wip.
One issue this implementation of CMSIS-DAP raised is that it supports
512byte HID reports, however using the current HIDAPI we have no cross platform
way of querying this info. Long term we plan to add this support to HIDAPI.
Change-Id: Ie8b7c871f58a099d963cd71a9f8a0105a38784e9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1625
Tested-by: jenkins
This is based on work from:
https://github.com/TheShed/OpenOCD-CMSIS-DAP/tree/cmsis-dap
Main changes include moving over to using HIDAPI rather than libusb-1.0
and cleaning up to merge into master. Support for reset using srst has
also been added.
It has been tested on all the mbed boards as well as the Freedom board
from Freescale. These boards only implement SWD mode, however JTAG mode
has been tested with a Keil ULINK2 and a stm32 target - but requires a lot
more work.
Change-Id: I96d5ee1993bc9c0526219ab754c5aad3b55d812d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1542
Tested-by: jenkins
We changed the actual target name quite a while ago.
This changes the actual target function names/defines to also match
this change.
Change-Id: I4f22fb107636db2279865b45350c9c776e608a75
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1626
Tested-by: jenkins
Usage:
export LIBUSB1_SRC=/path/to/libusb-1.0
export OPENOCD_CONFIG="--enable-..."
cd /work/dir
/path/to/openocd/contrib/cross-build.sh <host-triplet>
For static linking, a workaround is to
export LIBUSB1_CONFIG="--enable-static --disable-shared"
All the paths must not contain any spaces.
Feel free to comment or update this patchset with improvements.
Change-Id: Ib3b4970117f13a6140a1eddc493d324a52364519
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1531
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds example config and flash driver for russian Cortex-M3
microcontroller model.
Run-time tested on MDR32F9Q2I evaluation board; the flash driver
should be compatible with MDR32F2x (Cortex-M0) too but I lack hardware
to test.
There're no status bits at all, the datasheets specifies some delays
for flash operations instead. All being in <100us range, they're hard
to violate with JTAG, I hope. There're also no flash identification
registers so the flash size and type has to be hardcoded into the
config.
The flashing is considerably complicated because the flash is split
into pages, and each page consists of 4 interleaved non-consecutive
"sectors" (on MDR32F9 only, MDR32F2 is single-sectored), so the
fastest way is to latch the page and sector address and then write
only the part that should go into the current page and current sector.
Performance testing results with adapter_khz 1000 and the chip running
on its default HSI 8MHz oscillator:
When working area is specified, a target helper algorithm is used:
wrote 131072 bytes from file testfile.bin in 3.698427s (34.609 KiB/s)
This can theoretically be sped up by ~1.4 times if the helper
algorithm is fed some kind of "loader instructions stream" to allow
sector-by-sector writing.
Pure JTAG implementation (when target memory area is not available)
flashes all the 128k memory in 49.5s.
Flashing "info" memory region is also implemented, but due to the
overlapping memory addresses (resulting in incorrect memory map
calculations for GDB) it can't be used at the same time, so OpenOCD
needs to be started this way: -c "set IMEMORY true" -f
target/mdr32f9q2i.cfg
It also can't be read/verified because it's not memory-mapped anywhere
ever, and OpenOCD NOR framework doesn't really allow to provide a
custom handler that would be used when verifying.
Change-Id: I80c0632da686d49856fdbf9e05d908846dd44316
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1532
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
* Add Thumb-2 code to write flash memories that don't support DQ5 polling
* Make sure default values for unlock commands are set even if there is no PRI information given by the flash
* Add a fixup to disable DQ5 polling for the SST 39VF3201C
Change-Id: Ib08cf20547d0f500d5f78241521e6b49050c3d40
Signed-off-by: IS2T development team <dev.is2t@gmail.com>
Reviewed-on: http://openocd.zylin.com/1449
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Added support for ARMv7-M targets in arm_nandwrite and
arm_nandread.
Change-Id: Iab1d78d401f735e191c6a8519f3619035a300fae
Signed-off-by: Henrik Nilsson <henrik.nilsson@bytequest.se>
Reviewed-on: http://openocd.zylin.com/1188
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Limited (no page unprotect, no block writes) implementation of EFM32
flash support. Verified with EFM32 development kit and STLink V2 adapter
using SWD.
Change-Id: I3db2054d9aa628a1fe4814430425db3c9959c71c
Signed-off-by: Roman D <me@iamroman.org>
Reviewed-on: http://openocd.zylin.com/1106
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is the new proprietary interface replacing the older FTDI based adapters.
It is currently fitted to the ek-lm4f232 and Stellaris LaunchPad.
Change-Id: I794ad79e31ff61ec8e9f49530aca9308025c0b60
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/922
Tested-by: jenkins
Added a flash driver designed to allow program/erase of
memory-mapped SPI flash chips for LPC43xx/LPC18xx family
micros. This driver includes three algorithms - erase,
write, and SPIFI peripheral initialization (to allow
memory-mapped access after a reset). The driver has been
added to the flash driver table (drivers.c), and the
OpenOCD documentation has been updated to include the flash
driver configuration command.
Change-Id: I79f4ff8f1f07de4e5f2fe4f8c23aeb903f868514
Signed-off-by: George Harris <george@luminairecoffee.com>
Reviewed-on: http://openocd.zylin.com/783
Tested-by: jenkins
Reviewed-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
It's unnecessary and prevents reusing this function to fix
option byte writes.
Also try to disable flash writing after an error.
Change-Id: Ib5a7b768a1523e6b8da1555126fef4c1e60ab083
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/479
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Use loaders that have been built for cortex-m0, making them usable for both
cortex-m0 and cortex-m3 families.
Change-Id: Ifd82be87eaec2cb96464290c80800cec3630d619
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/604
Tested-by: jenkins
Fix following warning message logged by udev at start
udevd[421]: SYSFS{}= will be removed in a future udev
version, please use ATTR{}= to match the event device,
or ATTRS{}= to match a parent device, in
/etc/udev/rules.d/95-openocd.rules:81
Change-Id: I6de935c13a3327e3d718c110f97d19b9847ceca5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/552
Tested-by: jenkins
Reviewed-by: Luca Bruno
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This enable the stm32f2x flash driver to use the asynchronous
algorithm support.
Speed increase is as follows:
before - wrote 1048576 bytes from file stm32f4x.bin in 30.453804s (33.625 KiB/s)
after - wrote 1048576 bytes from file stm32f4x.bin in 23.679497s (43.244 KiB/s)
This also fixes a bug that was in the old flash loader.
The old loader waited while bit16 of the status reg was 0, the new
loader waits until this bit is 0 as stated in the flash spec.
Bizarrely this bug did not effect programming on any tested parts.
Change-Id: I3efc94d42cbe81283673a8f4203700638080af6e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/460
Tested-by: jenkins
This enable the Stellaris flash driver to use the asynchronous
algorithm support.
Speed increase is as follows:
before - wrote 65536 bytes from file test.bin in 5.486040s (11.666 KiB/s)
after - wrote 65536 bytes from file test.bin in 2.274001s (28.144 KiB/s)
Change-Id: I9004c9aadffa1ae3b0cbf908e6549b5b1f794508
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/403
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Correct the offset to the read pointer when clearing it on error.
Also restrict the instruction set to armv6-m so the flash driver can be
used on Cortex-M0 parts with the same flash controller.
Change-Id: I380f9dabcc41fb6e4d43a7e02f355e2381913f39
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/399
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
