Commit Graph

116 Commits

Author SHA1 Message Date
Oleg Seiljus
993fe4ab63 Signalyzer: H2 and H4 support
This patch includes partial support for these new JTAG adapters.
More complete support will require updates to the libftdi code,
for EEPROM access.

[dbrownell@users.sourceforge.net: fix whitespace, linelen, etc ]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-27 12:40:24 -07:00
Oleg Seiljus
ad5192a2b9 Signalyzer: new config files
Add configs for H2, H4, LITE.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-27 11:56:04 -07:00
David Brownell
4a26390eec PXA255: force reset config
These chips need both SRST and TRST when debugging,
and SRST doesn't gate JTAG.
2009-10-26 22:59:46 -07:00
David Brownell
4a91b070ff omap3530: target reset/init improvements
Now I can issue "reset halt" and have everything act smoothly;
the vector_catch hardware is obviously not kicking in, but the
rest of the reset sequence acts sanely.

 - TAP "setup" event enables the DAP, not omap3_dbginit
   (resolving a chicken/egg bug I noted a while back)
 - Remove stuff from omap3_dbginit which should never be
   used in event handlers
 - Cope better with slow clocking during reset

Also, stop hard-wiring the target name: use the input params in
the standard way, and set up $_TARGETNAME as an output param.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-26 22:53:18 -07:00
Spencer Oliver
8f3b28ff41 Fix incorrect line endings
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2009-10-26 22:39:24 +00:00
Wookey
eaebc6cd69 balloon3 board base config
This is the very basic board config for the balloon3 board cpu JTAG
channel.

The rest of the config comprises another 14 .cfg files which I suspect
openocd doesn't really want all of. I'm still not sure how to deal
with this. I'll post another mail/patch to discuss.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-26 11:14:08 -07:00
Øyvind Harboe
a07422c26c fix syntax of mww phys. 2009-10-25 22:15:57 +01:00
Øyvind Harboe
fcf1301e52 mww_phys retired. Replaced by generic mww phys in target.c 2009-10-21 22:25:33 +02:00
Øyvind Harboe
79e257a209 Added the faux flash driver and target. Used for testing. 2009-10-20 12:23:56 +02:00
David Brownell
c70073ef67 davinci: add watchdog reset method
Lightly tested on dm365.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-19 22:50:51 -07:00
Dean Glazeski
76b4ee8935 SDRAM and clock configuration for the SAM9-L9260 board from Olimex 2009-10-18 22:26:38 +02:00
Wookey
dd54981702 Fw: [PATCH] OpenRD board configuration
Ofrwarded from Ron, who's not subscribed.

----- Forwarded message from Ron <ron@debian.org> -----

From: Ron <ron@debian.org>
Date: Wed, 14 Oct 2009 04:50:17 +1030
To: wookey@debian.org
Subject: [PATCH] OpenRD board configuration
X-Spam-Status: No, score=-3.6 required=4.5 tests=BAYES_00,RCVD_IN_DNSWL_LOW
	autolearn=ham version=3.2.5

This piggybacks on the 'sheevaplug' layout which uses the same Kirkwood SoC.

Signed-off-by: Ron Lee <ron@debian.org>
2009-10-14 15:51:57 +02:00
Øyvind Harboe
44e9200d0a iMX target config script's ported from Freescale BSP. 2009-10-14 11:04:44 +02:00
David Brownell
7afc181e42 omap2420.cfg updates
Remove ircapture/mask attributes.  Add "srst_nogate".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-14 02:00:34 -07:00
Øyvind Harboe
f8cd850c4d arm11 seems to gate JTAG when srst is asserted 2009-10-13 12:10:23 +02:00
Wookey
407061eaa6 Xilinx xcr3256.cfg basic config script 2009-10-12 15:12:35 +02:00
Øyvind Harboe
bbd7e22f0b burst writes work fine. clean up junk. 2009-10-12 14:08:29 +02:00
Øyvind Harboe
026559068d Merge commit 'origin/master' 2009-10-12 09:28:56 +02:00
Øyvind Harboe
b23b096c8e Supply default reset_config statement to make target scripts useful standalone and provide sensible default 2009-10-12 09:25:08 +02:00
Wookey
456ec36795 Fix reset delays and tinker with ID's 2009-10-10 09:08:06 +02:00
Øyvind Harboe
20a3b14828 Merge commit 'origin/master' 2009-10-09 09:14:27 +02:00
Øyvind Harboe
bffe824df6 Added tip in documentation on how to translate quirky syntax 2009-10-09 09:03:53 +02:00
David Brownell
60e24aa597 make PXA255 targets enumerate sort-of-OK
Startup now mostly works, except that the initial target state
is "unknown" ... previously, it refused to even start.

Getting that far required fixing the ircapture value (which
can never have been correct!) and the default JTAG clock rate,
then providing custom reset script.

The "reset" command is still iffy.  DCSR updates, and loading
the debug handler, report numerous DR/IR capture failures.
But once that's done, "poll" reports that the CPU is halted
(which it shouldn't be, this was "reset run"!), due to the
rather curious reason "target-not-halted".

Summary:  you still can't debug these parts, but it's closer.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-08 23:51:50 -07:00
Rabeeh Khoury
7b650a6abe Function to flash SheevaPlug u-boot sectors
This function is used by the SheevaPlug installer to flash the
erase and re-flash the U-Boot environment in the NAND Flash.
2009-10-08 17:10:52 -07:00
David Brownell
41c1af7c67 initial builds of OSK5912 boards need srst_pulls_trst
This is clearly noted in the hardware spec (section 5.2.3); it
works around a chip erratum:  "If the MPU_RESET signal is used,
it may cause the EMIFS bus to lock."

I seem to have a board with such an initial build.  The chip
is labeled XOMAP.  Presumably, parts without that "X" prefix
(eXperimental) resolve this.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-08 13:15:18 -07:00
David Brownell
6efaa95c44 make OMAP5912 resets more reliable
Without some extra delay after releasing SRST, we seemed to
be trying to talk to the TAP before it was ready to respond.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-07 23:29:18 -07:00
John Rigby
37e9f65f5a iMX25 target support
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-07 21:49:36 -07:00
oharboe
dc871f422d first stab at imx35 reset init script
git-svn-id: svn://svn.berlios.de/openocd/trunk@2817 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-07 12:21:58 +00:00
oharboe
71bca7640a remove recrusive reset invocation from reset init callback
git-svn-id: svn://svn.berlios.de/openocd/trunk@2816 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-07 12:20:06 +00:00
dbrownell
0da2f750a1 Add basic support for DM6446 EVM board.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2808 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-06 22:56:52 +00:00
dbrownell
7d78021efa Dragonite target script
From: Nicolas Pitre <nico@fluxnic.net>


git-svn-id: svn://svn.berlios.de/openocd/trunk@2806 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-06 22:55:04 +00:00
oharboe
a2886fe3c6 stop using targetnum
git-svn-id: svn://svn.berlios.de/openocd/trunk@2804 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-06 08:10:05 +00:00
dbrownell
7c7467b34f Add a new JTAG "setup" event; use for better DaVinci ICEpick support.
The model is that this fires after scanchain verification, when it's
safe to call "jtag tapenable $TAPNAME".  So it will fire as part of
non-error paths of "init" and "reset" command processing.  However it
will *NOT* trigger during "jtag_reset" processing, which skips all
scan chain verification, or after verification errors.

ALSO:
 - switch DaVinci chips to use this new mechanism
 - log TAP activation/deactivation, since their IDCODEs aren't verified
 - unify "enum jtag_event" scripted event notifications
 - remove duplicative JTAG_TAP_EVENT_POST_RESET


git-svn-id: svn://svn.berlios.de/openocd/trunk@2800 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-05 08:20:28 +00:00
dbrownell
c6b24fb4f0 Get rid of needless OMAP and Davinci target config options
so they provide better examples and are easier to maintain.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2797 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-05 08:13:00 +00:00
mlu
f87985b614 Updated reset event handling in omap3530 cfg
git-svn-id: svn://svn.berlios.de/openocd/trunk@2796 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-10-02 16:52:02 +00:00
dbrownell
32599fab1a Remove annoying EOL whitespace (again, sigh).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2781 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-30 23:02:15 +00:00
oharboe
54c16fc56e strip gdb config options
git-svn-id: svn://svn.berlios.de/openocd/trunk@2779 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-30 05:40:40 +00:00
oharboe
642519649e michal smulski <michal.smulski@ooma.com> reset now works
git-svn-id: svn://svn.berlios.de/openocd/trunk@2778 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-30 05:37:32 +00:00
dbrownell
fbbd3066ff Don't provide invalid OMAP5912 IR capture value/mask attributes
git-svn-id: svn://svn.berlios.de/openocd/trunk@2762 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-27 07:59:10 +00:00
dbrownell
5c3c4af88f On DM355 EVM board, associate NAND chips with $_TARGETNAME
instead of a target number.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2761 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-26 22:08:50 +00:00
dbrownell
ad43374c7f Update DM355 target config to know about ICEpick.
Still defaults to nonstandard EMU0/EMU1 settings.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2757 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-25 17:02:59 +00:00
oharboe
43b3807878 Michael Hasselberg <mh@open-engineering.de> target configuration files for Toshiba TX09 familiy
git-svn-id: svn://svn.berlios.de/openocd/trunk@2756 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-25 16:48:15 +00:00
dbrownell
71af49ca7f Remove annoying end-of-line whitespace from tcl/* files
git-svn-id: svn://svn.berlios.de/openocd/trunk@2743 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21 18:48:22 +00:00
oharboe
0bcf5a6b76 Ethan Eade <ethan@evolution.com> board config script for Cogent CSB732 i.MX35 (arm1136)
git-svn-id: svn://svn.berlios.de/openocd/trunk@2741 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21 09:25:52 +00:00
dbrownell
108028112f Ensure that DaVinci chips can't start with a too-fast JTAG clock.
It can be sped up later, once it's known the PLLs are active.

Note that modern tools from TI all use adaptive clocking; and
that if that's done with OpenOCD, "too fast" is also a non-issue.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2740 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-21 00:37:58 +00:00
mlu
01735c515f Reduced sleep time after reset
git-svn-id: svn://svn.berlios.de/openocd/trunk@2732 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-19 14:47:53 +00:00
mlu
7b3be0e21e Move Cortex A8 debug access initialisation from omap3530.cfg to cortex_a8.c
git-svn-id: svn://svn.berlios.de/openocd/trunk@2728 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-18 15:11:46 +00:00
oharboe
9542318312 Rolf Meeser <rolfm_9dq@yahoo.de> adds flash support for NXP's LPC2900 family (ARM968E).
git-svn-id: svn://svn.berlios.de/openocd/trunk@2715 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-16 12:38:26 +00:00
oharboe
772d8d06ea Magnus Lundin <lundin@mlu.mine.nu> Disable poll while core register initialization
git-svn-id: svn://svn.berlios.de/openocd/trunk@2703 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-13 20:07:13 +00:00
oharboe
40f361dd94 David Brownell <david-b@pacbell.net>
Update the board config for the DaVinci DM355 EVM so the reset-init
event handler does the rest of the work it should do:

 - minor PLL setup bugfixes
 - initialize the DDR2 controller
 - probe both NAND banks
 - initialize UART0
 - enable the icache


git-svn-id: svn://svn.berlios.de/openocd/trunk@2699 b42882b7-edfa-0310-969c-e2dbd0fdcd60
2009-09-12 08:11:45 +00:00