Commit Graph

9455 Commits

Author SHA1 Message Date
Antonio Borneo 0432ac8399 arm_adi_v5: add missing enum DORMANT_TO_JTAG
Add the value DORMANT_TO_JTAG in the enum listing the SWJ-DP
switching sequences.
The corresponding bit-sequence is already available.

Change-Id: I6f1ffd29a8f5729ec70ce0303248bc251409d37d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6689
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-11-20 14:27:52 +00:00
Andreas Fritiofson caa1698136 cortex_m: Restore fast register reads if no polling is needed
If the target is in a state where S_REGRDY polling is necessary (slow
clock, low power state...?), OpenOCD will continue to use the slow
path even if the condition is temporary and the target at a later
point would be capable of fast reads again.

Revert to fast reads if a full register dump can be made without need
for polling any of the registers; presumably it will succeed the next
time too.

Change-Id: I557f0d90b7ce6f9d81aa409b6400fc9c83d16008
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6678
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-18 21:13:19 +00:00
Tomas Vanek 88f429ead0 target/cortex_m: faster reading of all CPU registers
Without the change cortex_m_debug_entry() reads all registers
calling cortex_m_load_core_reg_u32() for each register with
a poor usage of JTAG/SWD queue.
It is time consuming, especially on an USB FS based adapter.
Moreover if target_request debugmsgs are enabled, DCB_DCRDR
is saved and restored on each register read.

This change introduces cortex_m_fast_read_all_regs()
which queues all register reads and a single dap_run() transaction
does all work.

cortex_m_fast_read_all_regs() reads all registers unconditionally
regardless register cache is valid or not. This is a difference
from the original cortex_m_debug_entry() code.

cortex_m_debug_entry times from -d3 log, Cortex-M4F and CMSIS-DAP
(Kinetis K28F-FRDM kit)

target_request |                time [ms]
debugmsgs      | without the change | with the change
---------------+--------------------+-----------------
disable        |        186         |       27
enable         |        232         |       29

Added checking of DHCSR.S_REGRDY flag. If "not ready" is seen,
cortex_m->slow_register_read is set and fallback to the old
register read method cortex_m_slow_read_all_regs() is used
instead of cortex_m_fast_read_all_regs().

Change-Id: I0665d94b97ede217394640871dc451ec93410254
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/5321
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-11-18 21:09:34 +00:00
Antonio Borneo 65d7629183 cortex_m: poll S_REGRDY on register r/w
Accordingly to arm documentation [1], chapter C1.6.4, the
operation to read/write from/to core registers can require time,
and the specific flag DHCSR.S_REGRDY has to be polled to verify
that the operation has been completed.
The lack of check on S_REGRDY causes OpenOCD to fail handling
correctly the core registers on a Cortex-M4 emulated in a slow
FPGA, and it could also fail on devices clocked at very low speed
while using a fast adapter.

Poll S_REGRDY as specified in [1] while either reading or writing
the core registers.
A timeout of 0.5s is added. This could still be too small in some
extremely slow cases, but at least now we log the timeout event,
which can help tracking down such odd issue.
During register read include in the polling loop the read of DCRSR
and to flush the JTAG queue only once.
During register write, relax the write in DCRSR by removing the
atomicity that is now useless since followed by the atomic read to
S_REGRDY.
During register read include the read of DCRSR inside the polling
loop to relax the read of S_REGRDY since followed by the atomic
read to DCRSR.

This change has the drawback of adding other transfers to the
adapter while reading/writing the registers, so it is expected to
introduce some speed degradation during step-by-step.

[1] DDI0403E - "ARMv7-M Architecture Reference Manual"

Change-Id: I61f454248f11a3bec6dcf4c58a50c5c996d7ef81
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/5319
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-18 21:08:37 +00:00
Tomas Vanek 0dcf95c717 target/cortex_m: cumulate DHCSR sticky bits
DCB DHCSR register contains S_RETIRE_ST and S_RESET_ST bits cleared
on a read.

The change introduces a helper function cortex_m_cumulate_dhcsr_sticky().
Call this function each time DHCSR is read to preserve S_RESET_ST state
in the case of a reset event was detected.

Introduce cortex_m_read_dhcsr_atomic_sticky() convenience helper to
read DHCSR, store it to cortex_m->dcb_dhcsr and cumulate sticky bits.

The cumulated state of S_RESET_ST is read and cleared in cortex_m_poll()

Change-Id: Ib679599f850fd219fb9418c6ff32eed7cf5740da
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6180
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-18 21:08:00 +00:00
Tomas Vanek 111dcbeb1a target/cortex_m: use cortex_m->dcb_dhcsr in cortex_m_soft_reset_halt()
cortex_m->dcb_dhcsr caches status of DHCSR register.
Use it instead of local variable in cortex_m_soft_reset_halt()
like in other code.

Extracted from [1].

[1] Antonio Borneo: 6207: cortex_m: rework handling of dcb_dhcsr

Link: https://review.openocd.org/c/openocd/+/6207
Change-Id: I9a0aeba0b6b0b4969f05f4a32fc2fc8d244f56ca
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6677
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-18 21:07:46 +00:00
Tomas Vanek b502947a14 cortex_m: use cortex_m_write_debug_halt_mask() in cortex_m_single_step_core()
cortex_m_single_step_core() used mem_ap_write_atomic_u32() to manipulate
dhcsr bits unlike the rest of code, where a specialized function
cortex_m_write_debug_halt_mask() takes place.

Unify setting of dhcsr bits and use cortex_m_write_debug_halt_mask() here as well.

Extracted from [1].

[1] Antonio Borneo: 6207: cortex_m: rework handling of dcb_dhcsr

Link: https://review.openocd.org/c/openocd/+/6207
Change-Id: I9ef05ce88a9dce42e1d3d5404a4fe87ec86b5fe8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6676
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-18 21:07:27 +00:00
Janco Kock aa8a79809e flash/nor/at91samd: Add SAMR35J18B support
Add support for the mcu SAMR35J18B

Signed-off-by: Janco <janco@factorylab.nl>
Change-Id: I45d801485ad1c16d1b3086516a2b6d71d13f3fc7
Reviewed-on: https://review.openocd.org/c/openocd/+/6664
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-11-18 02:17:41 +00:00
asier70 5a0b4889d0 flash/nor/stm32f1x: Add support for GD32E23x
GD32E23x from GigaDevice is cortex-M23 microcontroller and it can work with the stm32f1x driver.
Modifications are similar to this done for GD32F1x0 in #6164 (https://review.openocd.org/c/openocd/+/6164).
Configuration file is added because its cortex-M23 CPU ID is different.
I think that GigaDevice microcontrollers should be handled in an independent unit to separate them from STM32,
but nowadays quick solution is welcome.

Signed-off-by: asier70Andrzej Sierżęga <asier70@gmail.com>
Change-Id: I91f31f5f66808bc50a8f607ac2c107e6b7c5e2b8
Reviewed-on: https://review.openocd.org/c/openocd/+/6527
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-15 15:35:50 +00:00
Antonio Borneo a498a3deaa jtagspi: fix build on MacOS
Commit be57b0ab84 ("Update jtagspi driver for 1-, 2- and 4-byte
addresses") introduces two incorrect format string for uint32_t
data types.
This cause build failure on MacOS:

src/flash/nor/jtagspi.c:474:35: error: format specifies type 'unsigned char'
but the argument has type 'uint32_t' (aka 'unsigned int') [-Werror,-Wformat]
        LOG_DEBUG("status=0x%02" PRIx8, *status);
        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~

src/flash/nor/jtagspi.c:513:65: error: format specifies type 'unsigned char'
but the argument has type 'uint32_t' (aka 'unsigned int') [-Werror,-Wformat]
        LOG_ERROR("Cannot enable write to flash. Status=0x%02" PRIx8, status);
        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~

Fix the format string.

Change-Id: I209053317c8b26c35c6f11be0553ccccc698c551
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: be57b0ab84 ("Update jtagspi driver for 1-, 2- and 4-byte addresses")
Reviewed-on: https://review.openocd.org/c/openocd/+/6701
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-11-13 22:36:03 +00:00
Tarek BOCHKATI 9d574aa3fa flash/stm32h7x: don't read flash size using the H74/H75x CPU2
CPU2 (Cortex-M4) cannot read flash size register.
assume the maximum flash size without triggering an error message

Change-Id: I5c3328b7cc42e3aa57165075021227d7936f3d26
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6670
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-11-13 10:53:26 +00:00
Tarek BOCHKATI 50f977b058 flash/stm32h7x: avoid using magic numbers for device ids
Change-Id: I4d682ee828404974abd9a42f98b840d77835cfe0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6669
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-11-13 10:53:01 +00:00
Tarek BOCHKATI 3f778c7c63 stlink (tcp): manage scattered stlink-server responses
detected in ubuntu 20.04
sometimes, the stlink-server response could be segmented on multiple
packets.

this causes stlink_tcp_send_cmd to fail with the following msg:
Error: failed to receive USB CMD response
because the received_size < expected size

to fix the issue, do recv in a loop till all data is received
or timeout is reached.

Change-Id: I46cc60c231b4cc52f150ead268f843bc60c41149
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6671
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-11-13 10:52:25 +00:00
Jan Matyas a4f8bf7a90 helper/log: Add macros for target-related errors/warnings/...
This commit introduces macros for target related log entries
(error, warning, ...) which is a very common operation in OpenOCD:

* LOG_TARGET_ERROR
* LOG_TARGET_WARNING
* LOG_TARGET_INFO
* LOG_TARGET_DEBUG
* LOG_TARGET_DEBUG_IO

The goal is to have one macro for this common operation and to
make such log entries look the same way - to make it more readable
for humans as well easier for parsing via scripts.

Change-Id: I6166565fc9040b03d3fca5c3aa44a1ccbcf96ad2
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6667
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-11-13 10:51:52 +00:00
Antonio Borneo e9a569aa18 jtag/adapter: fix memory leak on usb location
At exit, free the memory allocated to hold the USB location.

Change-Id: I050701f4dc8be14fd40e8add9d0b047461fa0d1c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6646
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-13 10:51:19 +00:00
Antonio Borneo ac1a632ba1 jtag: remove file driver.h
The only purpose of include file driver.h was to expose the API
to register the adapter's commands.

Move the prototype in adapter.h, already used by openocd.c.

Change-Id: Ie1090c60ef9e5bac5ea187c87bed6e7b08d9671c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6645
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-13 10:50:58 +00:00
Antonio Borneo 3c50288612 jtag: align adapter speed code to new structure
Rename the jtag_XXX functions as adapter_XXX.
Rename internal variables.
Adapt log messages and comments text.

Change-Id: I67f209c67074899cd58bad495055def03f0d1bcf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6644
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-13 10:50:34 +00:00
Antonio Borneo 679dcd0b52 jtag: move prototype of adapter init/quit and speed to adapter.h
After moved the code, align the include files.

Change-Id: I514a3020648816810d69f76c2ec4f6e52a1c57ab
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6643
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-13 10:49:59 +00:00
Antonio Borneo ba7d0bc491 jtag/adapter: move config vars in struct adapter_config
Move the static variables used to configure the adapter in
the struct adapter_config.

Change-Id: I1639e2bd39d0cbb12c71dfa347025558879d8b1d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6642
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-13 10:47:38 +00:00
Antonio Borneo b8ec1d4e7d jtag: move adapter init/quit and speed to adapter.c
The configuration code for adapter parameters is spread around.

Move in adapter.c the code that handles the configuration of
adapter speed.
For convenience, move also the functions adapter_init() and
adapter_quit(), that anyway have no reason to be in file core.c

To simplify the review, the code moved is not modified. It will be
cleaned and adapted in the following changes.

Change-Id: I2b38975a0cd2e74d3d2de6c56ea17818ff225fd8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6641
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-13 10:47:23 +00:00
Antonio Borneo 4cb3c9fae2 jtag/adapter: move 'usb location' code in adapter.c
The configuration code for adapter parameters is spread around.

Add a struct in adapter.c aimed at containing all the adapter's
configuration data.
Move in adapter.c the code related to configuring 'usb location'
and the copyright tag.
Add adapter.h to export the functions.
While there:
- rework the copyright and the SPDX tag;
- rename the 'usb location' functions;
- remove the JTAG_SRC variable in Makefile.am.

Change-Id: I4fe0d32991a8a30e315807180688035ae9ee01ce
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6640
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-13 10:47:02 +00:00
Antonio Borneo a9d0386411 jtag/core: get rid of variable 'jtag'
The variable 'jtag' is set to 'adapter_driver' during adapter
initialization and is used:
- to check if adapter has been initialized;
- as local copy of adapter_driver.

Introduce a static flag to check if the adapter has been already
initialized and a convenience test function.
Use the test function and the original value of adapter_driver in
the code and drop the variable 'jtag'.

Change-Id: I1b1c54d3b36d7b60390985d787c8449432788141
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6639
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-13 10:46:25 +00:00
Andreas Bolsch be57b0ab84 Update jtagspi driver for 1-, 2- and 4-byte addresses
jtagspi driver always used 3-byte addresses regardless of actual
device capcity. Now select 1- to 4-byte addresses depending on
device capacity.
Some devices need a special command to activate the 4-byte address
mode, a special command to accomplish this, and a further command
for setting device properties are added.
Additionally, restriction (start of range had to be page aligned)
removed.
Tested with XCS6SLX16 board and W25Q256FV in 3- and 4-byte address
modes.

Change-Id: I88b2877517a18dac460253ae6d97f3dded054e6c
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/4876
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: zapb <dev@zapb.de>
Tested-by: jenkins
2021-11-12 20:31:46 +00:00
Antonio Borneo b2ab2241f2 jimtcl: revert temporary workaround for memory leak in jimtcl 0.80
By using jimtcl from latest master branch, the workaround added in
commit 36ae487ed0 ("jimtcl: add temporary workaround for memory
leak in jimtcl 0.80") is not needed anymore.

Revert the workaround.

Change-Id: Ia1b5804be15362d0400740c375455ee19ac09f04
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6228
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-11-07 22:21:54 +00:00
Antonio Borneo 8b1ee1b1f6 Makefile: remove workaround for jimtcl 0.80
Commit 266a945ad3 ("jimtcl: update to version 0.80 (2020-10-29)")
adds a workaround to permit 'make distcheck' with jimtcl 0.80.
This has been fixed in jimtcl with commit d224c9a2b7b2 ("Makefile:
remove examples.api/Makefile while 'distclean'").

By using jimtcl from latest master branch, the workaround is not
required anymore.

Remove the workaround.

Change-Id: I10d91371b5a89d2a3c8599bce766f97eac44f0d9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6227
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-11-07 22:21:20 +00:00
Tim Newsome 5148a1324a rtos: use struct member names instead of comments
This is more readable, and as a bonus the compiler will help out if the
definition of the struct changes.

Change-Id: Ibf660134d9900173f6592407d5cc2203654a4a1b
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6659
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-11-05 22:45:13 +00:00
Paul Fertser da434d7d59 jtag: drivers: bcm2835gpio: don't allow GPIOs > 31
Current code assumes all the GPIO signals are manipulated via a single
32-bit register so using higher GPIOs silently fails.

Fix the check instead of trying to handle additional GPIOs (available on
Raspberry Pi Compute Modules) as that would slow the driver down.

Change-Id: Ib3b5864afb3b972d952f9b74665201cd93924959
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6658
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-11-05 22:44:47 +00:00
Andreas Fritiofson 4afd8852bb Remove remaining references to FTD2XX driver
This includes a USB blaster configuration that only worked with that
low-level access and some obsolete build-tests.

Change-Id: I53d27cbf782ebbd131b1af25e358adf35f2b4500
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6660
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-11-05 22:44:19 +00:00
Alex Crawford 6fef2eca38 drivers/linuxgpiod: add support for opendrain trst
This is a follow-up to 2f424b7eb, which added support for opendrain
srst, finishing up support for opendrain reset signals.

Signed-off-by: Alex Crawford <openocd@code.acrawford.com>
Change-Id: Ib79b2e12f2a9469fd6c53bb839c0d2e8e46103a4
Reviewed-on: https://review.openocd.org/c/openocd/+/6598
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-11-05 22:43:48 +00:00
Antonio Borneo bac3ef96b7 stlink: skip rw-misc commands with TCP server
The main purpose of TCP server is to allow multiple clients to
connect and share the same physical stlink.
The commands RW MISC don't lock the communication between command
and answer, thus cannot prevent another client to break this
sequence. The commands are not supposed to be used in shared mode.

Prevent the use of RW MISC commands on a (possibly) shared TCP
backend.
This degrades the overall performance, but the shared mode already
adds its own overhead, so this is not really an issue.

Change-Id: I713d912a269664859c8142932a9905d24b6d3caa
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6608
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-05 22:43:12 +00:00
Antonio Borneo 6df533abb8 stlink: add support for rw-misc commands
Firmware versions V2J32 and V3J2 introduce the commands RW-MISC
to put in a single USB packet a sequence of mem_ap read/write.
These commands provide a significant speed improvement while
accessing the debug unit at scattered addresses.

Add the low level commands and extend high level implementation.

Skip for the moment the command to read the max number of items
allowed by the firmware and use some hardcoded values.

Change-Id: I8adc630cc0de733511e9d94533cbfe9f3b301a83
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6607
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-05 22:42:55 +00:00
Antonio Borneo 22c76a4fd5 stlink: dequeue CSW write only if it doesn't change csw_default
The stlink commands for buffer read/write carry the associated CSW
value that has to be used. We can dequeue any CSW write request
and add the CSW in the following buffer read/write.

In preparation to next patch that uses stlink commands misc-rw
(commands that don't handle CSW value), let's dequeue only those
CSW write that don't change csw_default.

Keep a local cache of last csw_default.
Tag the queued CSW writes that change csw_default.
Dequeue only the un-tagged CSW writes.

On buffer read/write commands, limiting the dequeued CSW write
surely adds a performance penalty. But csw_default is not changed
often so the penalty is not significant.

Change-Id: I538d257fe3c434fc97587846d759951384327f02
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6606
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-05 22:42:33 +00:00
Antonio Borneo 9a534c4bb2 stlink: add support for native no_addr_incr commands
Firmware versions V2J26 and V3J1 introduce the command
STLINK_DEBUG_WRITEMEM_32BIT_NO_ADDR_INC
Firmware versions V2J32 and V3J2 introduce the command
STLINK_DEBUG_READMEM_32BIT_NO_ADDR_INC

These new commands can provide speed improvement to Cortex-A
memory download (its debug port use a FIFO for data transfer).

Add the low level commands and extend high level implementation.

Change-Id: I3b65acbeaec3bd305f5568b9ee4bc9495b113448
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6605
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-05 22:42:15 +00:00
Antonio Borneo da15f9f8c2 stlink: collapse consecutive mem AP r/w in a single command
Detect a sequence of memory AP operations that can be issued as a
single stlink command.
This improves the data throughput during memory transfer.

Change-Id: Ifa4488513346fc7cd0c9317b7d24ef510ccfd959
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6604
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-05 22:41:53 +00:00
Antonio Borneo 7920110665 stlink: detect mem_ap R/W and dequeue set TAR and CSW
By using the stlink commands for memory read write we can gain
some performance, but only when TAR and/or CSW are changed.
During long transfers with constant CSW and TAR auto-incremented
there is no gain, since the same amount of USB/TCP packet is used.
Plus, by dropping ADIv5 packed transfers the performance is lower
on 8 and 16 bits transfers.
This changes opens the opportunity for collapsing memory burst
accesses in a single stlink USB/TCP packet.

Initialize the values of enum queue_cmd to easily extract the word
size through a macro, even if this is not used here.

Change-Id: I6661a00d468a1591a253cba9feb3bdb3f7474f5a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6603
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-05 22:41:39 +00:00
Antonio Borneo 6f914cd899 stlink: expose ap number and csw in memory r/w
Recent versions of stlink firmware allow accessing access port
other than zero and setting the CSW.

Modify the internal API to provide ap_num and csw.
There is no interest to modify HLA to use ap_num and csw, so set
and use some backward compatible defaults.

Change-Id: I3f6dfc6c670d19467d9f5e717c6c956db6faf7f3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6602
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-05 22:41:26 +00:00
Antonio Borneo 76d1095231 stlink: add queue in dap-direct mode
Implement a minimalist queue for DP/AP commands and reorganize the
code to use it.
There is no performance improvement; the queue elements are still
sent one-by-one on USB or on TCP during dap_run().

Change-Id: I8353563e59f883624bcc0fbe8b54955e4f27ccfa
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6601
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-05 22:41:11 +00:00
Antonio Borneo fd0b4dd15f stlink: check buffer size on 16 and 32 bit memory transfer
Both HLA and ADIv5 layers limit the memory transfer within blocks
whose boundaries are aligned at 1024 or 4096 bytes.
New stlink firmware handle the ADIv5 TAR autoincrement, making
possible to send memory transfers across the boundary of 1024 or
4096 byte. OpenOCD doesn't use this feature yet.

Use the correct buffer size in the code, even if it is not used.
While there, split SWIM buffer size from JTAG/SWD case; stlink has
a dedicated command to retrieve SWIM buffer size, but currently
not implemented in OpenOCD.

Change-Id: Id46c0356ef21cead08726c044a1cd9725fd4f923
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6600
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-11-05 22:40:54 +00:00
Jimmy 7901cf2124 flash/nor/stm32lx: fixed writes at high adapter speeds
The busy flag must be polled after each half-page write.
At low clock speeds, no issue is observed when the poll
is omitted, because the writes complete before the next
write begins. But at high clock speeds the subsequent
writes would overlap and cause the operation to fail.

The status polls are done on the target for efficiency,
since the half-pages are very small.

Change-Id: Ia1e9b4a6a71930549b3d84a902744ce6e596301b
Signed-off-by: Jimmy <nhminus@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5598
Tested-by: jenkins
Reviewed-by: Jelle De Vleeschouwer
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>
2021-11-03 20:32:54 +00:00
Antonio Borneo 97db87c22e jtag/core: remove unused variable
Commit e3f3f60a02 ("adapter speed: require init script setting
and centralize activation from drivers to core.c") has already
dropped the only use of variable 'jtag_speed'.

Remove the variable.

Change-Id: Iff096df0022982cf90795aa62d6b3406203f7b14
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6638
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-10-25 16:13:29 +00:00
Antonio Borneo bba2eecbc2 jtag/aice: remove unused exported struct aice_interface_param_s
The struct aice_interface_param_s is declared but is never
referenced.
Drop it.

Change-Id: I4e6493d4baf292bb55dbd40228d4fa7c9e2afab5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6637
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-10-25 16:13:17 +00:00
Antonio Borneo 69190094ad hla: improve readability of struct hl_interface_s initialization
The initialization is barely readable, while actually only few
fields are set with value nor zero nor NULL.

Rewrite the initialization using C99 struct designations.

Change-Id: I4d288e6536ebe7110a184db6540223fc67361ec3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6636
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-10-25 16:13:03 +00:00
Antonio Borneo 0fb131c23a riscv: use relative path to include contrib's data
Doxygen cannot resolve the path of the files in folder contrib.
Use a path relative to current folder, as done in other files.

Change-Id: If39b416ed422b4854dd108777fa32dd4c809450a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6635
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
2021-10-25 16:12:54 +00:00
Antonio Borneo 37bce98395 openocd: remove 'src' prefix from #include path
There is no reason to add the 'src' prefix.
Remove it.

Change-Id: Id7d7ee8b3807fb90381cc1d6d545321020bc06c1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6634
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-10-25 16:12:42 +00:00
Tim Newsome 615709d140 Upstream a whole host of RISC-V changes.
Made no attempt to separate this out into reviewable chunks, since this
is all RISC-V-specific code developed at
https://github.com/riscv/riscv-openocd

Memory sample and repeat read functionality was left out of this change
since it requires some target-independent changes that I'll upstream
some other time.

Change-Id: I92917c86d549c232cbf36ffbfefc93331c05accd
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6529
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-10-25 16:12:05 +00:00
Antonio Borneo f4612e06c6 tcl/stm32mp15x: freeze watchdog, recover SWD after power cycle
Freeze the IWDG watchdog when cores are halted to prevent a reset
while debugging.

The PMIC present on some board senses the nsrst and forces a power
cycle to the target. The power cycle causes the SWJ-DP to restart
in JTAG mode. If the debugger is using SWD, the mismatch triggers
an error after the reset command.
Ignore the error detected by 'dap init' and proceed executing the
handler. The error in 'dap init' will force a reconnect during the
following 'dap apid', restoring the SWD functionality.

Change-Id: I04fcda6a5b8a1b080ab4e8890ecd0754d5ed12d9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6599
Tested-by: jenkins
2021-10-25 16:11:22 +00:00
Antonio Borneo 8a522d96c7 flash/nor/psoc6: fix doxygen comment
Commit 64c2e03b23 ("flash/nor: improved API of flash_driver.info
& fixed buffer overruns") changes the prototype of the function
psoc6_get_info() but didn't update the list of parameters in the
doxygen comment.

Fix the doxygen comment.

Change-Id: I1dce018b60d080973c5e351490d4d7baba422d74
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 64c2e03b23 ("flash/nor: improved API of flash_driver.info & fixed buffer overruns")
Reviewed-on: https://review.openocd.org/c/openocd/+/6620
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-10-25 16:10:40 +00:00
Antonio Borneo 0184ddba18 command: document enum command_mode
Add the description to doxygen documentation.

Change-Id: Iec04b4a37088e1b3b52ca84102820f450528b5b9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6593
Tested-by: jenkins
2021-10-25 16:10:28 +00:00
Antonio Borneo 8f1971295b mips64_pracc: fix three dead assignments
Clang scan-build complains for three dead assignments:
	Although the value stored to 'data' is used in the
	enclosing expression, the value is never actually read
	from 'data'

	Value stored to 'address' is never read

Remove the useless assignment and the variable 'data'.

Change-Id: Ie8dcb74b1c1aa5eea1acd06b3c45c5b44954c9e7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6592
Tested-by: jenkins
2021-10-25 16:10:16 +00:00
Antonio Borneo 327040ad74 target/lakemont: fix dead assignment
Clang scan-build complains for a dead assignment:
	Value stored to 'tapstatus' is never read

Remove the assignment and add a comment to point for a potential
removal of the line.

Change-Id: Iad2fdc7e6faf650e24cc086ee74c745acb0d1c73
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6591
Tested-by: jenkins
2021-10-25 16:10:04 +00:00