Commit Graph

3363 Commits

Author SHA1 Message Date
Tarek BOCHKATI
936cff887a cortex_m: fix VECTRESET detection for ARMv6-M cores
VECTRESET check should be done after verifying if the core is an ARMv6-M core,
and not before that.

Fixes: 2dc9c1df81 ("cortex_m: [FIX] ARMv8-M does not support VECTRESET")
Change-Id: I8306affd332b3a35cea69bba39ef24ca71244273
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6232
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-05-20 20:56:48 +01:00
Tarek BOCHKATI
3a85fd52b6 cortex_m: do not perform soft_reset_halt on targets without VECTRESET
Change-Id: Ib3df457e0afe4e342c82ad1af25e03aad6979d87
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6209
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-05-20 20:54:35 +01:00
Tomas Vanek
d7558e2ed6 target/armv7m: fix static analyzer warning
Despite of assert(is_packed) clang static analyser complains on use
of the uninitialized offset variable.

Cross compiling with latest x86_64-w64-mingw32-gcc hits warnings
	src/target/armv7m.c: In function ‘armv7m_read_core_reg’:
	src/target/armv7m.c:337:54: error: ‘reg32_id’ may be used
	    uninitialized in this function [-Werror=maybe-uninitialized]

It happens because mingw32 defines assert() without the attribute
"noreturn", whatever NDEBUG is defined or not.

Replace assert(is_packed) by if (is_packed) conditional and call
assert(false) in the else branch.

Change-Id: Id3c7dcccb65106e28be200b9a4d2b642f4d31019
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/6256
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>
2021-05-18 09:03:28 +01:00
Tarek BOCHKATI
d624da96a9 target/armv7m.h: [style] replace tab with space between variable type and name
Change-Id: I9740c25857295a2a655d3046322a3f23f0ee7f78
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6230
Reviewed-by: Marc Schink <dev@zapb.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-05-15 20:56:10 +01:00
Tarek BOCHKATI
5d9de1c400 cortex_m: add armv8m special registers
Change-Id: I1942f375a5f4282ad1fe4a2ff3b8f3cbc64d8f7f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6016
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-05-11 06:30:29 +01:00
Marc Schink
40dd1e5284 target/riscv: Change 'authdata_read' output
Use a constant output length and remove the line break to make the
authentication data easier to parse.

Change-Id: Iebbf1f171947ef89b0f360a2cb286a4ea15c6ba5
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6199
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
2021-05-08 09:49:52 +01:00
Marc Schink
167adaf841 target/stm8: Make 'stm8_command_handlers' static
Change-Id: I5237a8f2a1ecba9383672e37bd56f8ccd17598b6
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6200
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-05-08 09:49:32 +01:00
Antonio Borneo
82b6a41117 startup.tcl: prepare for jimtcl 0.81 'expr' syntax change
Jimtcl commit 1843b79a03dd ("expr: TIP 526, only support a single
arg") drops the support for multi-argument syntax for the TCL
command 'expr'.

Modify the script startup.tcl compiled-in OpenOCD binary to comply
with the new jimtcl.

Change-Id: I520dcafacadaa289a815035f93f250447ca66ea0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6158
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-05-08 09:48:36 +01:00
Antonio Borneo
223b79ebe2 telnet/auto-complete: hide deprecated and internal commands
For both:
- TCL proc that redirect deprecated commands to the new commands,
- TCL proc used internally and not supposed to be exposed to user,
add their name to the list of commands that should be hide by the
telnet auto-complete.

Change-Id: I05237c6a79334b7d2b151dfb129fb57b2f40bba6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6195
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-05-08 09:48:15 +01:00
Tarek BOCHKATI
8ecc2888cf cortex_m: use unsigned int for FPB and DWT quantifiers
related quantifiers are:
 - fp_num_lit
 - fp_num_code
 - dwt_num_comp
 - dwt_comp_available

Change-Id: I07dec2d4aa21bc0e580be0d9fd0a6809f876c2a8
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6185
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-05-04 23:13:20 +01:00
Tarek BOCHKATI
a115b589a7 cortex_m: implement hit_watchpoint function
this change aims to provide a better gdb debugging experience,
by making gdb understand what's really happening.

before this change when hitting a watchpoint
 - openocd reports "T05" to gdb
 - gdb displays: Program received signal SIGTRAP, Trace/breakpoint trap.

after the change
 - openocd reports "T05watch:20000000;" to gdb
 - gdb displays:
   Hardware watchpoint 1: *0x20000000

   Old value = 16000000
   New value = 170000000
   ...

Change-Id: Iac3a85eadd86663617889001dd04513a4211ced9
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6181
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-05-02 22:42:29 +01:00
Tim Newsome
87c90393fe Cleanup of config/includes.
Remove a use of AH_BOTTOM from configure.ac. This macro is used by
autoheader to add '#include' of some include file to the end of
config.h.in and then to config.h. OpenOCD can be built with a custom
config.h, so it's preferable to move these '#include' statement directly
in the C files that need them dropping this unneeded dependency.

It also causes problems when I want to use the gnulib library (which
comes with its own Makefile, and does not have the same include path as
the top-level Makefile).

So this change touches a lot of files, but is actually really simple. It
does not affect functionality at all.

Change-Id: I52c70bf15eb2edc1dd10e0fde23b2bcd4caec000
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/6171
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-05-01 14:35:09 +01:00
Christian Hoff
565129119f target/image: report error if ELF file contains no loadable sections
The existing code asserted in that case, which is not correct. This
would allow the user to crash OpenOCD with a bad ELF file, which is
not what we want. A proper error should be reported in that case and
OpenOCD should not crash.

Change-Id: Ied5a6a6fd4ee0fd163f3fe850d304a121ecbe33a
Signed-off-by: Christian Hoff <christian.hoff@advantest.com>
Reviewed-on: http://openocd.zylin.com/6172
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-05-01 13:36:28 +01:00
Florian Meister
9206bd243b target/image: allow loading of 64-bit ELF files
Change-Id: I9b88edacf5ffcc3c1caeab8c426693de0d92a695
Signed-off-by: Florian Meister <florian.meister@advantest.com>
Signed-off-by: Christian Hoff <christian.hoff@advantest.com>
Reviewed-on: http://openocd.zylin.com/5204
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Ooi, Cinly <cinly.ooi@intel.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-05-01 13:36:15 +01:00
Tarek BOCHKATI
ef0da79448 cortex_m: mark FPU register as non-existent instead of playing with num_regs
Change-Id: Iac7c5bfbb95c8d9a8c6d65104d138692a44eca78
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6015
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-04-30 08:23:29 +01:00
Tomas Vanek
ef0aa38c10 target/armv7m: change FPv4_SP and FPv5_SP/DP identifiers to uppercase
Change-Id: Ia421a973e5fb4767715c9f95c91745f8ca1de1da
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/6177
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-04-30 08:20:54 +01:00
Tomas Vanek
ab337d05f4 target/arm_adi_v5: move DP register definitions to one block
DP and MEM-AP definitions were mixed.

Change-Id: I2f691b2274c01e9090c1e5160c6903d3207e35c2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/6138
Tested-by: jenkins
2021-04-25 23:08:49 +01:00
Tomas Vanek
4455469847 target/adi_v5_swd: remove double space from swd_cmd() parameters
Change-Id: I6b68868947010512c4de76e5d37142f067e27b06
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/6137
Tested-by: jenkins
2021-04-25 23:08:41 +01:00
Tomas Vanek
45eff3a806 target/arm_adi_v5: add JTAG_TO_DORMANT sequence
Change-Id: Ie9e32e42a84cf88bf779e691a67c114eef1bb457
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/6136
Tested-by: jenkins
2021-04-25 23:08:19 +01:00
Antonio Borneo
3cacfd86ab smp: move command deprecation to startup.tcl
Commit 246782229f ("smp: replace commands smp_on/smp_off with
"smp [on|off]"") deprecates some multi-word comments, when openocd
was unable to properly handle mixes of multi-word commands and tcl
procedures having a common initial word.
This limitation is over, so move in startup.tcl the multi-word
commands deprecation, making it easy to remove them after a grace
period.

Change-Id: Icb550d1fa7559b95692d2a1244880da6c90ec0b2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5677
Tested-by: jenkins
2021-04-25 23:03:28 +01:00
Antonio Borneo
e216186fab helper/command: register full-name commands in jim
While still keeping the tree of struct command, stop registering
commands in jim by the root "word" only.

Register the full-name of the command and pass as private data the
struct command of the command itself.

Still use the tree of struct command to un-register the commands.

Some "native" commands (.jim_handler) share the same handler, then
the handler checks the command name to run the right code.
Now argv[0] returns the full-name of the command, so check the
name by looking in the struct command passed as private data.

Change-Id: I5623c61cceee8a75f5d5a551ef3fbf5a303af6be
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5671
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-04-18 15:34:10 +01:00
Antonio Borneo
41c95aa4ea helper/command: pass command prefix to command registration
Replace the "struct command *parent" parameter with a string that
contains the command prefix.
This abstracts the openocd code from the knowledge of the tree of
struct command.
This also makes unused the function command_find_in_context(), so
remove it.

Change-Id: I598d60719cfdc1811ee6f6edfff8a116f82c7ed6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5668
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-04-18 15:33:30 +01:00
Antonio Borneo
4289389937 helper/command: override target only on target prefixed cmds
In current code the current target is overridden whenever
jim_handler_data is not NULL. This happens not only with target
prefixed commands, but also with cti, dap and swo/tpiu prefixed
commands.
While this is not causing any run-time issue, by now, the
behaviour is tricky and makes the code cryptic.

Add a specific field to struct command for the target override so
the content of jim_handler_data can be restricted to command
specific data only (today only cti, dap and swo/tpiu).

Extend the API register_commands() to specify the presence of
either the command data or the override target.

The new API makes obsolete calling command_set_handler_data() to
set jim_handler_data, so remove it.

Change-Id: Icc323faf754b0546a72208f90abd9e68ff2ef52f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5667
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-04-18 15:33:23 +01:00
Antonio Borneo
7cd679a2de helper/command: get current target from dedicated API
Now that target override is uniformly implemented for all types of
commands, there is no need for target-prefixed "native" commands
(.jim_handler) to sneakily extract the overridden target from the
struct command.

Modify the commands to use the standard API get_current_target().

Change-Id: I732a09c3261e56524edd5217634fa409eb97a8c6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5666
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-04-18 15:33:15 +01:00
Antonio Borneo
a510c8e23c helper/command: always pass struct command as jim private data
While registering a new command, jim accepts a pointer to command's
private data that will be accessible during the command execution.

Today openocd is not consistent and passes different private data
depending on the command, and then even overwrites it:
- "simple" commands (.handler) are registered with their own
  struct command pointer as command private data;
- "native" commands (.jim_handler) at root level are registered
  with NULL command private data;
- "native" commands (.jim_handler) not at root level are
  registered with the struct command pointer of their root command
  as command private data but, when executed, the command private
  data is overwritten by the value in field jim_handler_data taken
  from their struct command.

Uniform the usage of command private data by always set it to the
struct command pointer while registering the new commands.
Note: for multi-word commands only the root command is registered,
so command private data will be set to the struct command of the
root command. This will change later in this series when the full-
name of the command will be registered.

Don't overwrite the command private data, but let the commands that
needs jim_handler_data to get it directly through struct command.

For sake of uniformity, let function command_set_handler_data() to
set the field jim_handler_data also for "group" commands, even if
such value will not be used.

Now Jim_CmdPrivData() always returns a struct command pointer, so
wrap it in the inline function jim_to_command() to gain compile
time check on the returned type.
While there, uniform the code to use the macro Jim_CmdPrivData()
to access the command's private data pointer.

Change-Id: Idba16242ba1f6769341b4030a49cdf35a5278695
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5664
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-04-18 15:32:57 +01:00
Cheng-Shiun Tsai
a9904ba22c Aarch64:Switch to EL1 from EL0 before manipulate MMU
If current core is in EL0, it cannot use 'msr sctlr_el1, x0'

Change-Id: I04e60e39e4c84f9d9de7cc87a8e438f5d2737dc3
Signed-off-by: Cheng-Shiun Tsai <cheng.shiun.tsai@gmail.com>
Reviewed-on: http://openocd.zylin.com/6051
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2021-04-18 15:32:24 +01:00
Antonio Borneo
0f06d94336 mem_ap: allow GDB connections
The target mem_ap is a convenient way to access buses, memory and
peripherals behind an ARM AP.
The current implementation provides only access through OpenOCD
commands, because GDB remote protocol has to interact with a CPU
and has to operate on CPU states and registers.
Using GDB to access the memory is welcome, because GDB can resolve
the symbol's address from an ELF file and can nicely display the
content of complex struct and data types.

Extend mem_ap target with the bare minimal support for a remote
GDB connection, by emulating a fake basic ARM core. It means that
only a GDB that has support for ARM can be used (either 'aarch64',
'arm' or 'multiarch' GDB). This is not seen as a big limitation,
because the mem_ap target is mainly used on ARM based devices.

Add a minimalist register description for the fake CPU.
Fill the field 'debug_reason' as expected by GDB server.
Call the target halted event to reply to GDB halt requests.

For backward compatibility, don't open the GDB port by default. If
needed, it has to be specified at 'target create' or 'configure'
with the flag '-gdb-port'.

Change-Id: I5a1b7adb749746516f5d4ffc6193c47b70132364
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6034
Tested-by: jenkins
2021-04-11 21:34:30 +01:00
Liming Sun
651b861d5d target/aarch64: Add watchpoint support
There are some breakpoint/watchpoint related code in armv8_dpm.c,
but seems not working for aarch64. Target aarch64 has its own
breakpoint implementation in aarch64.c. This commit follows the
same logic to add watchpoint support for target aarch64.

This commit also increases the size of stop_reason[] in function
gdb_signal_reply() since the old size is too small to fit in a
64-bit address, such as ffff8000115e6980.

Change-Id: I907dc0e648130e36b434220f570c37d0e8eb5ce1
Signed-off-by: Liming Sun <lsun@mellanox.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/4761
Tested-by: jenkins
Reviewed-by: Liming Sun <limings@nvidia.com>
Reviewed-by: Kevin Burke <kevinb@os.amperecomputing.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-04-11 21:28:01 +01:00
Evgeniy Didin
eca4f964b4 target/arc: refactor ARC register numbers defines
For Zephyr rtos support it is necessary to define general register
numbers for architecture. There were some already in arc.h file.
Let's define ARC registers numbers as a set instead of separate defines.

Change-Id: I63742b8608f9556c2ec9bd2661a0fd9cf88e9b74
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/6105
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-19 22:01:00 +00:00
Rene Kita
6db49eb885 build: remove warnings with gcc 11
This removes some warnings which prevent a successful build with -Werror
which is enabled by default. I'm using gcc 11, so maybe others are not
getting this warnings yet.

In src/flash/nor/numicro.c the debug messages were misleadingly indented.
In src/target/arm920t.c the array size where smaller than expected from
the receiving function.

Change-Id: I66f5c6a63beb9f9416e73b726299297476c884d8
Signed-off-by: Rene Kita <git@rkta.de>
Reviewed-on: http://openocd.zylin.com/6104
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-19 22:00:34 +00:00
Tarek BOCHKATI
84af95bb54 aarch64: handle semihosting in aarch32 state
Change-Id: I0e868d617db126a2b258e27b11979b75b5bb72f5
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5860
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-19 21:59:48 +00:00
Tim Newsome
41147e6fcd Implement CRC32 algorithm for RISC-V.
Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: Id437f78e74e3d837ff203f84c4eeb996bfad9a01
Reviewed-on: http://openocd.zylin.com/6076
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-03-19 21:58:17 +00:00
Christian Hoff
6c0151623c aarch64: add support for "reset halt"
Support halting the CPU directly after a reset. If halt is
requested, the CPU stops directly at the reset vector, before
any code is executed.

This functionality was implemented using the Reset Catch
debug event.

Change-Id: If90d54c088442340376f0b588ba10267ea8e7327
Signed-off-by: Christian Hoff <christian.hoff@advantest.com>
Reviewed-on: http://openocd.zylin.com/5947
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-03-19 21:57:43 +00:00
Antonio Borneo
25218e8935 jtag: remove minidriver code and minidriver-dummy
With zy1000 removed, there is no other implementation that uses
the minidriver, apart from the test/example minidriver-dummy.
While the idea of the minidriver is probably still valid (that is
to intercept jtag primitives before serialization), there is no
current use case, no guarantee it is really working, and the way
it was implemented (by macros and #if conditionals) is really hard
to maintain and test.

Let's let it rip in git history, from where it could eventually be
taken back in a more modern implementation.
The entry points of minidriver API are still in the code with the
original names.

Change-Id: I882e32cb26cf5842f9cba14e3badaf8948e3760d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6091
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-03-19 21:56:06 +00:00
Antonio Borneo
26a57b06cf oocd_trace: drop the code, deprecated in v0.10.0
The code for oocd_trace has been marked as deprecated in release
v0.10.0, 4 years ago.

Time to drop it!

Change-Id: I989f8345dee4ff2369bcf5e2e2ace86bbd5aa6a5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6088
Tested-by: jenkins
2021-03-19 21:55:15 +00:00
Antonio Borneo
113f949ac1 target: remove handling of target's deprecated_name
We do not have anymore any deprecated target name.
Drop the code to handle deprecated target names and the placehold
in struct target_type.

This patch is separated from the patch that drops the remaining
deprecated target names to be ready to revert this if there is any
need in the future.

Change-Id: I96fca7ffa39d8292f81e79f115ea45c4a30035d7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6087
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-03-19 21:55:02 +00:00
Antonio Borneo
64b486e74f target: remove target names already deprecated in v0.8.0
Some target name were marked as deprecated in release v0.7.0 and
v0.8.0, almost 7 years ago, and replaced with more 'actual' names.
We can reasonably expect that in these 7 years any user of OpenOCD
has already migrated to v0.8.0 or to some newer release, thus has
already updated any local/personal script to get rid of the
deprecated message.

Drop the target names already deprecated in v0.8.0.

Change-Id: I7c7491496db1b302b4eb1e9fc6090b58d4acf05a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6086
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-03-19 21:54:57 +00:00
Antonio Borneo
70ead8ff5d startup.tcl: remove commands already deprecated in v0.7.0
Some command were already marked as deprecated in release v0.7.0,
more then 7 years ago, and for some of them the depredation date
is even earlier.
We can reasonably expect that in these 7 years any user of OpenOCD
has already migrated to v0.7.0 or to some following intermediate
build, thus has already updated any local/personal script to get
rid of the deprecated message.

Drop the commands already deprecated in v0.7.0.

Change-Id: I81cdc415ab855ebf30980ef5199f9780c5d7f932
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6085
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-03-19 21:54:51 +00:00
Antonio Borneo
cda7bc9a4c target/arm920t: remove command 'arm920t cp15i' deprecated in v0.4.0
The command 'arm920t cp15i' was marked as deprecated in release
v0.4.0, almost 11 years ago.
We can reasonably expect that in these years any user of OpenOCD
has already migrated to v0.4.0 or to some newer release, thus has
already updated any local/personal script.
There is no run-time warning about the deprecation, but it is
reported in the help and in the documentation.

Drop the command already deprecated in v0.4.0.

Change-Id: I755c4283e13e125558fcd73b15fe20498eae95ca
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6083
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-03-19 21:54:41 +00:00
Antonio Borneo
ab0def0f38 target/arm720t: remove command 'arm720t cp15' deprecated in v0.4.0
The command 'arm720t cp15' was marked as deprecated in release
v0.4.0, almost 11 years ago.
We can reasonably expect that in these years any user of OpenOCD
has already migrated to v0.4.0 or to some newer release, thus has
already updated any local/personal script.
There is no run-time warning about the deprecation, but it is
reported in the help and in the documentation.

Drop the command already deprecated in v0.4.0.

Change-Id: I2b325d0312d96ca5e5f0f1bad13bb162b3b75c52
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6082
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-03-19 21:54:32 +00:00
Tarek BOCHKATI
bc0c9907d6 cortex_m: avoid reading and writing non-existent registers
Change-Id: Iedc24352c8d3444372da06d00fcec9603540f950
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6059
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-10 21:35:31 +00:00
Antonio Borneo
cb8e3fb2d9 server: revert commit 7e6556b3ca
With the removal of old tpiu code, commit 7e6556b3ca ("server:
permit the add_service function to return the created service")
http://openocd.zylin.com/5717/ can be reverted.

Fix also the new calls to add_service().

Change-Id: Ib7f2dfc6a9e829239e20313e0f121911085fdc00
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6031
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
2021-03-10 21:34:13 +00:00
Antonio Borneo
dc7b32ea4a armv7m_trace: get rid of the old tpiu code
Remove all the old tpiu code and replace it with a wrapper that
uses the new commands, prints-out the new commands and informs
about the deprecation.

All the code that handles the deprecated tpiu commands is enclosed
between the comments
	/* START_DEPRECATED_TPIU */
and
	/* END_DEPRECATED_TPIU */
so will be easy to remove it in the future.

Change-Id: I70b0486770128203b923346382d9a90b8ec08439
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6030
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
2021-03-10 21:34:04 +00:00
Antonio Borneo
184724d14e arm_tpiu_swo: add support for independent TPIU and SWO
This is supposed to replace big part of armv7m_trace.[ch], since
TPIU is not only the one implemented in Cortex-M3 and M4.

Change-Id: I7588d16cbefe9cdb371c52fb0aa5cdfb48518804
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5858
Tested-by: jenkins
2021-03-10 21:33:40 +00:00
Antonio Borneo
f9509c92db itm: rework itm commands before 'init'
If the command 'itm port[s]' is issued before 'init', the ITM can
not be programmed because OpenOCD cannot access the target yet.
The configuration is recorded and applied after target examine.
The current test to trigger the ITM delayed-programming is based
on the TPIU configuration. This is allowed because the only use of
ITM it so send data through TPIU.
In case of system TPIU, not belonging anymore to the target, there
is no more association between target ITM and system TPIU.

Add a flag to record the pending ITM configuration requested
before 'init' and test the flag to trigger the delayed-programming
of the ITM.

Change-Id: I101eb97a116d7925cd2ff068f3e8813fc008b08e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6029
Tested-by: jenkins
2021-03-10 21:33:09 +00:00
Antonio Borneo
faaa42283f stlink: fix execution order in stlink_config_trace()
The change [1] guarantees that the value pointed by 'prescaler'
gets always set, even when the adapter does not support the
specific mode requested (e.g. sync), or during trace disabling.
This works fine with the code in armv7m_trace_tpiu_config(), but
requires all the parameters to be valid also to disable the trace
(with 'enable==false'), otherwise returns error on incorrect
parameters or even causes segmentation fault if pointers
'trace_freq' or 'prescaler' are NULL.

Another problem in stlink_config_trace(), not linked with [1], is
caused by a tentative to change the settings on an already enabled
trace; the trace is disabled before the new parameters are fully
validated and in case of invalid parameters the trace is not
re-enabled.
It would be more logical to first check all the parameters, then
disable the trace, change the settings and re-enable the trace.

Practically revert [1] by checking 'enable==false' at function
entry, then disable trace and exit without any further check on
the other parameters.
For the case 'enable==true', validate all the function parameters
then disable the trace, update the trace settings and re-enable
the trace.
Modify the caller armv7m_trace_tpiu_config() to initialize the
variable 'prescaler' to a safe value to avoid the issue targeted
by [1].

[1] commit 38277fa752 ("jtag/drivers/stlink_usb: fix SWO prescaler")

Change-Id: Ia6530682162ca2c9f5ac64301f2456f70cc07ed2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5934
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
2021-03-10 21:32:43 +00:00
Adrian Negreanu
169e5bf186 armv7m_trace_itm_config: wait for ITMBusy to be cleared
pg315 of CoreSight Components:

It is recommended that the ITMEn bit is cleared and waits for the
ITMBusy bit to be cleared, before changing any fields in the
Control Register, otherwise the behavior can be unpredictable.

Change-Id: Ie9a2b842825c98ee5edc9a35776320c668047769
Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com>
Reviewed-on: http://openocd.zylin.com/6043
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-10 21:31:27 +00:00
Yasushi SHOJI
547fa6eeb7 target: Remove redundant initialization of endianness
target->endianness is initialized to TARGET_ENDIAN_UNKNOWN at 34 lines
below, before calling target_configure.  This initialization is
redundant and not needed.

Change-Id: Iea2d5e17a13c1a8b0b209ba7c20043736b520ef6
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Reviewed-on: http://openocd.zylin.com/6039
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-10 21:30:27 +00:00
Marc Schink
02abae8cdf target/mips: Remove typedef'd struct
The C style guide forbids typedef'd structs, see 'Naming Rules'.

Change-Id: I449590251056c478c05105cdc18014ab4eb77ed8
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6033
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-10 21:30:04 +00:00
Antonio Borneo
23d8831391 target: avoid polling during 'resumed' event handler
OpenOCD is based on a single main loop that schedules all the
activities.
At the execution of a TCL command, the timestamp is checked to
eventually trigger the polling of the targets. This means that by
executing a TCL command the polling can be triggered and detect a
change of target's state.

When openocd 'resumes' a target, the target can halt again by
hitting a breakpoint.
The 'resumed' event handler is started just after the target has
been resumed, but it triggers a polling before the execution of
its very first instruction.
If the polling finds the target halted, it will run the 'halted'
event handler, that will then be executed 'before' the pending
'resumed' handler.

In case of gdb, a 'continue' command will restart the target but,
polling (and halt detection) executed before the end of the resume
process will hide the halt. As a consequence, the gdb will not be
informed of the halt and will remains waiting as if the target is
still running without showing the prompt.

This can be verified by running on the target a firmware with a
loop, run openocd with a dummy 'resumed' event, and let gdb to set
a breakpoint in the loop. A 'continue' command will cause the
target to halt again by hitting the breakpoint at the next loop
iteration, but gdb will loose it and will not return the prompt.

	openocd -f board/st_nucleo_f4.cfg -c \
		'stm32f4x.cpu configure -event resumed {echo hello}'
	arm-none-eabi-gdb -ex 'target remote :3333' -ex 'b *$pc' -ex c

Disable the polling while executing target's resume().
Document it and provide hints to developers to cope with future
implementation.

Change-Id: I3be830a8e7c2ef6278617cb4547a4d676b0ddeb5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Габитов Александр Фаритович <gabitov@planarchel.ru>
Reviewed-on: http://openocd.zylin.com/6074
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-03-04 14:58:58 +00:00
Peter Mamonov
54ef790149 target: use proper macro for parsing watchpoint address
Currently wp/rwp commands fail on 64-bit targets:

	> wp 0xffffffff80001400 4
	addr option value ('0xffffffff80001400') is not valid

Change-Id: I94d4af906b02b7bd463c8d79a6235a3646dfc434
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Reviewed-on: http://openocd.zylin.com/6058
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-02-13 13:08:31 +00:00
Tarek BOCHKATI
2dc9c1df81 cortex_m: [FIX] ARMv8-M does not support VECTRESET
ref: Arm®v8-M Architecture Reference Manual (DDI0553B.m)
     D1.2.3: AIRCR, Application Interrupt and Reset Control Register
             Bit [0] is RES0

Change-Id: I6ef451b2c114487e2732852a60e86c292ffa6a50
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Reviewed-on: http://openocd.zylin.com/6014
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-18 15:32:03 +00:00
Tarek BOCHKATI
404993b29f target/riscv: fix build error with -Werror=maybe-uninitialized
using gcc 9.3 on ubuntu focal fossa with -Werror=maybe-uninitialized
we get this error:
  /src/target/riscv/riscv.c: In function ‘riscv_address_translate’:
  /src/target/riscv/riscv.c:1536:13: error: ‘pte’ may be used uninitialized

Change-Id: I51e180b43f9b6996e4e4058db49c179b9f81bcdc
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Reviewed-on: http://openocd.zylin.com/6013
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-18 15:31:56 +00:00
Antonio Borneo
7e64e5a895 openocd: fix doxygen parameters of functions
Add to doxygen comment the missing parameters.
Remove from doxygen comment any non-existing parameter.
Fix the parameter names in doxygen comment to match the one in the
function prototype.
Where the parameter name in the doxygen description seems better
than the one in the code, change the code.
Escape the character '<' to prevent doxygen to interpret it as an
xml tag.

Change-Id: I22da723339ac7d7a7a64ac4c1cc4336e2416c2cc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6002
Tested-by: jenkins
2021-01-13 11:33:53 +00:00
Antonio Borneo
4cf5ab614b openocd: fix incorrect doxygen comments
Use '@param' in front of function's parameters and '@a' when the
parameter is recalled in the description.

This fixes doxygen complains:
	warning: Found unknown command '@buff16'

While there, fix a minor typo s/occured/occurred/ in a comment and
the typo s/@apram/@param/ in a doxygen comment.

Change-Id: I5cd86a80adef552331310a21c55ec5d11354be21
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6001
Tested-by: jenkins
2021-01-13 11:33:16 +00:00
Antonio Borneo
c1270bcb38 target: fix memory leak on multiple '-gdb-port' flag
In the odd case of multiple flags '-gdb-port' during 'target
create' or following 'configure', the new strdup()'ed value will
replace the old one without freeing it.

Free the old value (if it exists) before replacing it.

Change-Id: I1673346613ce7023880046e3a9ba473e75f18b8a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6005
Tested-by: jenkins
2021-01-13 11:32:34 +00:00
Antonio Borneo
ed73398eb0 cortex-a: fix reset on dapdirect transports
The target code for assert reset on cortex_a has been patched on
commit b0698501b0 ("cortex_a: fix cortex_a_assert_reset() if
srst_gates_jtag") then in cdba6ba0ad ("cortex_a: fix reset for
SWD transport") to workaround the mismatch between jtag and swd
implementations. See discussion for the second patch at
http://openocd.zylin.com/3641/

While all of these mismatches should hopefully be cleaned by the
reset framework rework, an extension of the workaround of the
second patch is required for dapdirect transports, either
dapdirect_swd and dapdirect_jtag.

Extend the existing workaround to all non-jtag transports.

Change-Id: Ia6a9d43bab524cbb3de4c37ce24c45f25187353d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5979
Tested-by: jenkins
2020-12-26 15:47:48 +00:00
Antonio Borneo
722f579706 armv7m_trace: stop getting traces from adapter at exit
If OpenOCD is reading trace data from the target, at exit it
should stop the adapter to gather data, but should left the target
still producing them.

Add a helper in armv7m_trace to disable the adapter's trace and
call it during OpenOCD teardown.

This also provides a workaround for an issue in the firmware of
ST-Link V3 till version V3J7. If the SWD connection is closed when
trace is active, at following connection the trace does not work
anymore.

Change-Id: I47ccab61405384938555096c5aca789eaa090d27
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5978
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Tested-by: jenkins
2020-12-26 15:47:44 +00:00
Antonio Borneo
1d3d87695c target/register: use an array of uint8_t for register's value
The use of 'void *' makes the pointer arithmetic incompatible with
standard C, even if this is allowed by GCC extensions.
The use of 'void *' can also hide incorrect pointer assignments.

Switch to 'uint8_t *' and add GCC warning flag to track any use of
pointer arithmetic extension.

Change-Id: Ic4d15a232834cd6b374330f70e2473a359b1607f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5937
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05 23:18:37 +00:00
Antonio Borneo
b5e015357a mips_mips64: fix minor host endianness bug
Commit 80f1a92bd7 ("mips64: Add generic mips64 target support")
adds a log of the target's program counter in function
mips_mips64_debug_entry() by directly casting the little-endian
buffer in pc->value.
This is going to print an incorrect value on big-endian hosts.

Use the function buf_get_u64() to return the register value.

Not tested on real HW. Issue identified with GCC compiler flag
'-Wcast-align=strict' after change http://openocd.zylin.com/5937/
("target/register: use an array of uint8_t for register's value").

Change-Id: Icbda2b54a03fdec287c804e623f5db4252f9cd2a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 80f1a92bd7 ("mips64: Add generic mips64 target support")
Reviewed-on: http://openocd.zylin.com/5944
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05 23:18:33 +00:00
Antonio Borneo
a56b729191 arm7_9_common: fix host endianness bug in arm7_9_full_context()
The original code passes to ->read_core_regs() and to
->read_xpsr() the pointer to the little-endian buffer reg.value.
This is incorrect because the two functions above require a
pointer to uint32_t, since they already run the conversion with
arm_le_to_h_u32() in the jtag callback.
This causes a mismatch on big-endian host and the registers get
read with the incorrect endianness.

Use an intermediate buffer to read the registers as uint32_t and
to track the destination reg.value pointer, then copy the value in
reg.value after the call to jtag_execute_queue().

Tested with qemu-armeb and an OpenOCD built through buildroot
configured for cortex-a7 big-endian.

Note that if jtag_execute_queue() fails, the openocd register
cache is not updated, so the already modified flags 'valid' and
'dirty' are incorrect. This part should be moved after the call to
jtag_execute_queue() too.

Change-Id: Iba70d964ffbb74bf0860bfd9d299f218e3bc65bf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5943
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05 23:18:29 +00:00
Antonio Borneo
62686ab161 armv4_5: fix output of command 'arm reg'
Commit fc2abe63fd ("armv7m: use generic arm::core_mode") adds
two special modes for ARMv6M and ARMv7M in struct arm_mode_data[].
While these modes do not have any additional register to be dumped
by command 'arm reg', the command still prints an header for these
modes but not followed by any register.

Detect the special modes for ARMv6M and ARMv7M and skip them to
avoid printing the useless header.

Change-Id: I04145769e5742624f143c910eebf9a6f6d8e3cdc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: fc2abe63fd ("armv7m: use generic arm::core_mode")
Reviewed-on: http://openocd.zylin.com/5942
Tested-by: jenkins
2020-12-05 23:18:22 +00:00
Antonio Borneo
693b8501e5 armv4_5: fix segmentation fault in command 'arm reg'
Commit fed7131049 ("armv4_5: support weirdo ARMv6 secure monitor
mode") introduces the secure mode 28 of ARMv6 as a synonymous of
mode 22 (MON), but does not add it in the switch/case in command
'arm reg'.
When command 'arm reg' scans the array arm_mode_data[] on targets
without secure modes, it does not detect the new secure mode as
not supported by the architecture, thus triggers a segmentation
fault when it try to read the register's value from unallocated
memory.
Issue detected with target arm926ejs.

Add the new mode in the switch/case and treat it as the mode MON.

Change-Id: I2b72cc558e097879a7ee6ea601200bfda6b60270
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: fed7131049 ("armv4_5: support weirdo ARMv6 secure monitor mode")
Reviewed-on: http://openocd.zylin.com/5941
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-12-05 23:18:15 +00:00
Marc Schink
7b641d3d4e Add initial RTT support
Real Time Transfer (RTT) is an interface specified by SEGGER based on
basic memory reads and writes to transfer data bidirectionally between
target and host.
Every target that supports so called "background memory access", which
means that the target memory can be accessed by the debugger while the
target is running, can be used.

RTT is especially of interest for targets which do not support Serial
Wire Output (SWO) (e.g. ARM Cortex-M0) or where using semihosting is
not possible (e.g. real-time applications) [1].

The data transfer is organized in channels where each channel consists
of an up- and/or down-channel. See [2] for more details.

Channels are exposed via TCP connections. One or more RTT server can be
assigned to each channel to make them accessible to an unlimited number
of TCP connections.

The current implementation does not respect buffer flags which are used
to determine what happens when writing to a full buffer.

Note that the implementation is designed in a way that the RTT
operations can be directly performed by an adapter (e.g. J-Link).

[1] https://devzone.nordicsemi.com/tutorials/6/
[2] https://www.segger.com/jlink-rtt.html

Change-Id: I8bc8a1b381fb74e08b8752d5cf53804cc573c1e0
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/4055
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-02 23:15:52 +00:00
Tomas Vanek
d459a2d27d adi_v5_swd: wait for readable DPIDR, ABORT if stalled
Reading of DPIDR is the very first operation after JTAG to SWD sequence.
Without this change if DPIDR read fails then swd connect fails.

Keep trying JTAG to SWD sequence and DPIDR read until success
or timeout 0.5 sec. It makes setting of adapter srst delay on SWD transport
mostly unnecessary.

Also test for ERROR_WAIT (which should not occur according to
IHI 0031E B4.3.2 but a quirk is known) and if bus is kept stalled
then issue abort to make the next connect possible.

Change-Id: Id8fe6618605bbeb4fed5061e987ed55de90a35f2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5730
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-02 23:15:16 +00:00
Tomas Vanek
646c3c9902 arm_adi_v5: prevent possibly endless recursion in dap_dp_init()
If dap_dp_read_atomic() in 30 trials loop fails, dap->do_reconnect is set.
Following dap_dp_read_atomic() calls dap_queue_dp_read() which in case
of SWD transport calls swd_queue_dp_read(). It starts
with swd_check_reconnect() and it calls swd_connect() because
dap->do_reconnect is set. swd_connect() does some initialization,
reads DPIDR and calls dap_dp_init() again!

Moreover if dap_dp_init() is called from cortex_m_reset_(de)assert()
one level of recursion is necessary to reconnect the target.

Introduce dap_dp_init_or_reconnect() for use in cortex_m reset
and similar.
Remove loop of 30 atomic reads of DP_STAT to prevent unwanted recursion.

Change-Id: I54052fdefe50bf5f7c7b59fe751fe2063d5710c9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5729
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-02 23:15:08 +00:00
Tomas Vanek
b1f488ec1e target/armv7m, cortex_m: fix misleading comments
Change-Id: I4fea29f07f4d3b8b2578b538ef0eef5f1eea285f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5876
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:09:08 +00:00
Tomas Vanek
f32ca2d25d target/cortex_m: remove wrong xPSR.ICI/IT bits handling
If a Cortex-M (not M0, M0+) target was stopped in the middle of
a conditional IT block or in the load/store multiple instruction,
cortex_m_debug_entry() used wrong xPSR bits to detect it and then
cleared 8 bits of the exception number from xPSR
- probably wrong bit mask again.

I believe clearing of the ICI/IT bits in cortex_m_debug_entry() has no
reason as Cortex-M does not use instruction injecting.

Remove the wrong code.

The change was originally a part of http://openocd.zylin.com/4862
It is now re-submitted as #4862 is not ready.

Change-Id: If91cd91d1b81b2684f7d5f10cf20452cde1a7f56
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5874
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:08:41 +00:00
Tomas Vanek
fc91936be7 target/armv7m: use arch_info[i].value instead of allocated memory
Change-Id: I9422cab484d0769404516947e16da1baa001a4e0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5328
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:08:26 +00:00
Antonio Borneo
d811d2838b cortex_m: use the new enum ARMV7M_REGSEL_name
Register xPSR is indexed directly with its value 16 or with the
incorrect enum ARMV7M_xPSR.

Replace them with the new enum ARMV7M_REGSEL_xPSR.

Change-Id: I86600e7f78e39002ce45f66d4792d5067c1f541b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5873
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15 21:08:14 +00:00
Tomas Vanek
62394a6b1c target/cortex_m,hla_target: rework Cortex-M register handling part 4
Consolidate low level register read/write.

Floating point registers were handled by target_read/write_u32
unlike other registers handled by cortexm_dap_read/write_coreregister_u32
There is no reason to do so in cortex_m.
Remove cortexm_dap_read/write_coreregister_u32
and use cortex_m_load/store_core_reg_u32 directly.

Similarly HLA adapters register read/write interface supports all registers
so use it for any floating point and other registers.

Change-Id: Ida679e5f4fec02d94ffb0bd3f265ed7ed2221cdc
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5864
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:06:45 +00:00
Tomas Vanek
d3a37b0e76 target/armv7m: rework Cortex-M register handling part 3
Move primask/basepri/faultmask/control packing/unpacking from
cortex_m.c and hla_target.c to armv7m.c armv7m_read_core_reg()
and armv7m_write_core_reg() where also the FP 32/64-bit registers
conversion takes place.

Introduce a new hidden register ARMV7M_PMSK_BPRI_FLTMSK_CTRL
for packing/unpacking of special registers in the register cache.

The new packing/unpacking is endianess safe.

While on it improve returned error codes and LOG_ messages.

Just minimal changes in cortex_m.c and hla_target.c, will be
consolidated in the next patch.

Change-Id: Id51e764e243e54b5fdaadf2a202eee7c4bc729fe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5863
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:06:23 +00:00
Tomas Vanek
e4160bd422 target/armv7m: rework Cortex-M register handling part 2
Make arm register id coherent with reg_list index.
Without this reg_list[ARMV7M_R12] was possible but
reg_list[ARMV7M_FPSCR] was out of bounds.

Remove unused items from reg_list index.

Change-Id: I84d3b5c496fc1839d07a5b74cb1fd1c3d4ff8989
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5862
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-15 21:06:00 +00:00
Tomas Vanek
efbc447ed8 target/armv7m: rework Cortex-M register handling part 1
Define a new enum with DCRSR.REGSEL selectors.
Introduce armv7m_map_id_to_regsel() to unify mapping in one place.
Use DCRSR.REGSEL selectors for low level register read/write.

Change-Id: Ida0ccdfa9cdb1257a1900b8bfbf172b076374d39
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5327
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-15 21:05:51 +00:00
Tomas Vanek
f8453ae52c target, register: allow a register hidden from gdb and 'reg' cmd
Introduce a 'hidden' flag in struct reg to support a register cache
containing different views of same data: e.g. Cortex-M has
primask, basepri, faultmask and control registers accessed
as one word. With the hidden flag we can add an reg_list item
corresponding to hw access without exposing the register to user level.

All the struct reg are allocated with calloc() but one in xscale.c
allocated by malloc(). Change this one to use calloc() as well
to guarantee initial value hidden=false

Change-Id: I8da9f5a5a60777ae7ef943a841307487bd80fc6f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5325
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15 21:05:37 +00:00
Antonio Borneo
109dc1975f flash/stmqspi: minor fixes on coding style
Add space around operators;
use BIT() macro in place of left shifting constant 1;
remove space between cast operator and value;
do not check a pointer before free() it;
add parenthesis around parameters in macros;
fix indentation using only TABs;
remove line continuation '\' at code lines out of macros.

Change-Id: I809e8ee72d7bfe49d0edf10afb36efe2458de77c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: e44539d66c ("Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface")
Reviewed-on: http://openocd.zylin.com/5932
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-15 21:04:29 +00:00
Kevin Yang
06c7a53f1f target/cortex_m: Change sleep to running state
When the core is in sleep mode, the core is no longer retiring
instructions. Cortext M remains in "unknown" state. This patch converts
sleep mode to "running" state.

Change-Id: I1e9b6c9be51fd0f1f6ce81af9b1f5f9f1f43c661
Signed-off-by: Kevin Yang <kangyang@google.com>
Reviewed-on: http://openocd.zylin.com/5921
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-11-11 21:22:16 +00:00
Andreas Bolsch
e44539d66c Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface
- write speed up to 150 kByte/s on STM32F469I-disco (due to
  SWD clock and USB connection), up to 1 MByte/s on Nucleo-F767ZI
  with external STLink-V3 or Nucleo-G474RE with two W25Q256FV in
  dual 4-line mode or STM32H73BI-Disco in octal mode
- tested with STM32L476G-disco (64MBit flash, 3-byte addr),
  STM32F412G-Disco, STM32F469I-Disco, STM32F746G-Disco, and
  STM32L476G-Disco (all 128Mbit flash, 3-byte addr),
  STM32F723E-Disco, STM32F769I-Disco (512Mbit flash, 4-byte addr)
  STM32L4R9I-Disco, STM32L4P5G-Disco (512MBit octo-flash, DTR, 4-byte addr)
  STM32H745I-Disco, STM32H747I-Disco (two 512MBit flash, 4-byte addr)
  STM32H73BI-Disco, STM32H735G-Disco (512MBit octo-flash, DTR, 4-byte addr)
- suitable cfg for Discovery boards included
- limited parsing of SFDP data if flash device not hardcoded
  (tested only in single/quad mode as most devices either don't
  support SFDP at all or have empty(!) SFDP memory)
- 'set' command for auto detection override (e. g. for EEPROMs)
- 'cmd' command for arbitrary SPI commands (reconfiguration, testing etc.)
- makefile for creation of binary loader files
- tcl/board/stm32f469discovery.cfg superseded by stm32f469i-disco.cfg
- tcl/board/stm32f7discovery.cfg removed as name is ambiguous
  (superseded by stm32f746g-disco.cfg vs. stm32f769i-disco.cfg)
- dual 4-line mode tested on Nucleo-F767ZI, Nucleo-H743ZI and Nucleo-H7A3ZI-Q
  with two W25Q256FV, and on Nucleo-L496ZP-P and Nucleo-L4R5ZI
  with two W25Q128FV, sample cfg files included and on STM32H745I-Disco,
  STM32H747I-Disco, STM32H750B-Disco
- read/verify/erase_check uses indirect read mode to work around silicon bug in
  H7, L4+ and MP1 memory mapped mode (last bytes not readable, accessing last
  bytes causes debug interface to hang)
- octospi supported only in single/dual 1-line, 2-line, 4-line
  and single 8-line modes, (not in hyper flash mode)

Requirements:
GPIOs must be initialized appropriately, and SPI flash chip be configured
appropriately (1-line ..., QPI, 4-byte addresses ...). This is board/chip
specific, cf. included cfg files. The driver infers most parameters from
current setting in CR, CCR, ... registers.

Change-Id: I54858fbbe8758c3a5fe58812e93f5f39514704f8
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4321
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Christopher Head <chead@zaber.com>
2020-11-08 22:46:00 +00:00
Antonio Borneo
ad06fba6f0 target/arm7tdmi: remove unused/deprecated function parameter
The function arm7tdmi_clock_out() has one unused 'deprecated'
parameter.

Drop the unused 'deprecated' parameter and the FIXME above it.

Change-Id: Ia8de41f5b8258825faccc737bba622e44c81a7ea
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5912
Tested-by: jenkins
2020-11-07 20:53:26 +00:00
Kevin Yang
92ea7e41b9 target: Examine subsequent targets after failure
When a target examination fails, continue to examine subsequent targets.
Return the number of targets that failed to examine.

Change-Id: I883a0c445edc7eb00f496b79271d773771ec6b66
Signed-off-by: Kevin Yang <kangyang@google.com>
Reviewed-on: http://openocd.zylin.com/5855
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07 20:52:26 +00:00
Marc Schink
73746d78b7 target/image: Use proper data types
While at it, fix some coding style issues.

Change-Id: Id521394d89e0bf787a6f812701c2cc0fe7e4e63f
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5919
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07 20:52:00 +00:00
Adrian Negreanu
850e85fa6f semihosting: print the semihosting operation id
Change-Id: If5c3568bd1c99a48ac492137f48da0d9764efe14
Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com>
Reviewed-on: http://openocd.zylin.com/5923
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Reviewed-by: Tim Newsome <tim@sifive.com>
2020-11-07 20:50:16 +00:00
Tarek BOCHKATI
9cce6b3c76 armv7m: add a TCP channel to stream captured trace
When trace capturing the trace is enabled using 'tpiu_config internal'
(via the internal mode), OpenOCD can collect the trace buffers then append
it to a specified file or named pipe and propagate the trace to 'tcl_trace'
command.
This change is allowing OpenOCD to stream the captured trace over TCP.

When using this configuration OpenOCD acts like a server and multiple
clients can connect and receive the captured trace.

Example on STM32F7 running at 216MHz:
  itm port 0 on
  tpiu config internal :3344 uart off 216000000


Change-Id: Idea43e7e26e87b98a33da7fb9acf7ea50fe3b345
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5345
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-07 20:49:57 +00:00
Tarek BOCHKATI
7e6556b3ca server: permit the add_service function to return the created service
returning the created service seems useful:

as the only method to get the freshly created service is by getting the
last item in the services linked list, and this seems to be like an
intrusion to service internal mechanism.

possibly, we could get the service from a connection but this is possible
only from [new_connection|input|connection_closed]_handler_t, but this is
not always practical:
  example: armv7m: add a TCP channel to stream captured trace
           http://openocd.zylin.com/#/c/5345/
           here we poll for trace and broadcast to all connections
           outside of these xxx_handler_t functions

also, storing one of the connections in new_connection_handler_t and get
the service from it is possible, but this will make the code less readable.

Change-Id: I5fef1baecec1e054953c6faf5b99d864ecc97f02
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5717
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-11-07 20:49:53 +00:00
Antonio Borneo
c8628541ae target/adi_v5_jtag: remove unused global variable
Change-Id: Ia4e8b90359c23f4be1d3677b44b0ebd063bb8dcc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5901
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-04 17:39:53 +00:00
Antonio Borneo
9d50f3f3af cortex_m: declare local functions as static
Functions that are not used outside the file should be declared as
static.

Change-Id: Ie81f6bdce91e2a1456364b47f30aa4d35c7ee7bc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5900
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
2020-11-04 17:39:47 +00:00
Antonio Borneo
5ca2301743 target: declare local symbols as static
Functions and variables that are not used outside the file should
be declared as static.

Change-Id: I9f97571a528f0cb3c3c26f873577ab16fdec3cdc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5895
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-04 17:39:17 +00:00
Antonio Borneo
65de0d3bfa target: handle command 'target current' when no target is present
Is it possible to run OpenOCD without any target, for example to
only dump the rom-tables of an arm dap, or to perform low level
jtag operations.
But without any target created, the command 'target current'
causes OpenOCD to abruptly exit.

Handle in command 'target current' the case of no targets.

Change-Id: Ide15cb13bec84b88ccc3e7126523c04a6d70e636
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5881
Tested-by: jenkins
2020-11-04 17:38:20 +00:00
Antonio Borneo
e2e8a5f467 gdb_server: allow multiple GDB connections to selected targets
The default way of working is to have a single GDB attached to one
target, so OpenOCD accepts only one connection to the GDB port of
each targets and rejects any further connection.

There are some barely safe use cases in which it could get useful
having a second GDB connection to the same target.
One such use case is while using GDB as a 'non-intrusive memory
inspector', as explained in the OpenOCD documentation.
One GDB can be left running an infinite loop to dump some memory
area, or even analysing the content, while keeping a second GDB
ready for user interaction or spot memory check.

Add a target configure option to specify the maximum number of GDB
connections allowed for that target, keeping the default to 1.

Change-Id: I4985a602e61588df0b527d2f2aa5b955c93e125e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5865
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-11-04 17:37:59 +00:00
Antonio Borneo
ec0c23a3ab target/arm_cti: use adiv5_jim_mem_ap_spot_configure()
To avoid code duplication, reorganize the code to replace
cti_configure() with adiv5_jim_mem_ap_spot_configure().

Reorganize 'struct arm_cti_object' and its sub-'struct arm_cti'
moving DAP and mem-AP info in a 'struct adiv5_mem_ap_spot'.
Replace cti_configure() with adiv5_jim_mem_ap_spot_configure().
Deprecate the use of '-ctibase' in favor of '-baseaddr'.

Change-Id: I43740a37c80de67c0f5e4dc79c3400b91a12e9e8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5869
Tested-by: jenkins
2020-11-04 17:37:25 +00:00
Antonio Borneo
080fab2ecd target/arm_adi_v5: add helper to get mem_ap spot in configure/cget
This is somehow an extension of existing adiv5_jim_configure(),
but includes the 'address' in the mem_ap.
Rewrite adiv5_jim_configure() using the new helper.

Change-Id: Ia7effeeece044004d459b45126ed4961a98b8568
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5857
Tested-by: jenkins
2020-11-04 17:36:13 +00:00
Christopher Head
d05ef53cbd target: restore last run state after profiling
Now that it’s possible to start profiling from either a running or a
halted state, rather than unconditionally halting after profiling
finishes, it makes more sense to restore the processor to whatever state
(running or halted) it was in before profiling started.

Change-Id: If6f6e70a1a365c1ce3b348a306c435c220b8bf12
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5237
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-30 22:01:07 +00:00
Christopher Head
d3aa2d3536 target/cortex_m: reduce duplication in profiling
The Cortex-M implementation of profiling contains a bunch of
conditionals and checks to handle both chips which have PCSR and chips
which do not. However, the net effect of the non-PCSR branches is
actually exactly the same as what target_profiling_default does. Rather
than duplicating this code, just detect the situation where PCSR isn’t
available and delegate to target_profiling_default.

Change-Id: I1be57ac77f983816ab6bf644a3cfca77b67d6f70
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5236
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-30 22:00:57 +00:00
Christopher Head
a7502ee8b9 target: allow profiling from running
There are a handful of implementations of profiling. There is the
default implementation, which repeatedly halts and resumes the target,
sampling PC each time. There is the Cortex-M implementation, which
uses PCSR if available, otherwise falling back to halting and resuming
and sampling PC. There is the OR1K implementation, which reads NPC
repeatedly. Finally, there is the NDS32 implementation which uses some
kind of AICE commands with which I am unfamiliar.

None of these (with the possible exception of the NDS32
implementation) actually require the target to be halted when starting
profiling. The Cortex-M and OR1K actually resume the target as pretty
much their first action. The default implementation doesn’t do this,
but is written in such a way that the target just flips back and forth
between halted and running, and the code will do the right thing from
either initial state. The NDS32 implementation I don’t know about.

As such, for everything except NDS32, it is not really necessary that
the target be halted to start profiling. For the non-PCSR Cortex-M and
default implementations, there is no real harm in such a requirement,
because profiling is intrusive anyway, but there is no benefit. For
the PCSR-based Cortex-M and the OR1K, requiring that the target is
halted is annoying because it makes profiling more intrusive.

Remove the must-be-halted check from the target_profiling function.
Add it to the NDS32 implementation because I am not sure if that will
break when invoked with a running target. Do not add it to any of the
other implementations because they don’t need it.

Change-Id: I479dce999a80eccccfd3be4fa192c904f0a45709
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5235
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-30 22:00:49 +00:00
Evgeniy Didin
0d3a67b23f target/arc: introduce watchpoints support
With help of actionpoint mechanism now it is possible to introduce
watchpoints support for ARC.

Change-Id: I5887335d0ba38c15c377bc1d24a1ef36e138cf65
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5867
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-24 23:25:03 +01:00
Sylvain Chouleur
5e61d59c90 cortex_m: support control.FPCA
Bit 2 of control register is used if the processor includes the FP
extension

Change-Id: Ie21bc9de8cae5bad9d841e1908eff3aa0bb29d4b
Signed-off-by: Sylvain Chouleur <schouleur@graimatterlabs.ai>
Reviewed-on: http://openocd.zylin.com/5853
Reviewed-by: Sylvain Chouleur <sylvain.chouleur@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-10-22 21:19:12 +01:00
Antonio Borneo
4fc61a2f9d riscv: fix compile error
The commit b68674a1da ("Upstream tons of RISC-V changes.") was
proposed well before commit 3ac010bb9f ("Fix debug prints when
loading to flash"), but the merge got in different order.
After latest merge, the master branch fails to compile.

Fix the compile error.

Change-Id: Ia3bd21d970d589343a3b9b2d58c89e0c49f30015
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5856
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
2020-10-14 11:05:22 +01:00
Tim Newsome
b68674a1da Upstream tons of RISC-V changes.
These are all the changes from https://github.com/riscv/riscv-openocd
(approximately 91dc0c0c) made just to src/target/riscv/*. Some of the
new code is disabled because it requires some other target-independent
changes which I didn't want to include here.

Built like this, OpenOCD passes:
* All single-RV32 tests against spike.
* All single-RV64 tests against spike.
* Enough HiFive1 tests. (I suspect the failures are due to the test
suite rotting.)
* Many dual-RV32 (-rtos hwthread) against spike.
* Many dual-RV64 (-rtos hwthread) against spike.

I suspect this is an overall improvement compared to what's in mainline
right now, and it gets me a lot closer to getting all the riscv-openocd
work upstreamed.

Change-Id: Ide2f80c9397400780ff6780d78a206bc6a6e2f98
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/5821
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2020-10-14 05:43:05 +01:00
Antonio Borneo
3ffa14b043 target/aarch64: fix use of 'target->private_config'
The function adiv5_jim_configure() casts the void pointer
'target->private_config' to a struct adiv5_private_config pointer.
This is tricky in case of aarch64, where the private data are in a
struct aarch64_private_config that has as first element the struct
adiv5_private_config.

While the current solution is working fine, it's not clean and
requires special attention for any further code development.

Override 'target->private_config' to the correct pointer while
calling adiv5_jim_configure().

Change-Id: Ic2fc047dd1e57013943d96e6d5879a919d1eb7b3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5847
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-10-11 15:53:52 +01:00
Kevin Yang
63d3640add target/aarch64: Use apnum setting
Change aarch64 to use ap-num setting if provided. Fall back to original
behavior of using first AP when ap-num is invalid.

Change-Id: I0d3624f75c86ba5fd5a322ac60856dbbb6e71eaf
Signed-off-by: Kevin Yang <kangyang@google.com>
Reviewed-on: http://openocd.zylin.com/5831
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-11 15:53:43 +01:00
Daniel Trnka
87b95ab212 target/cortex_m.c: vector_catch command checks if a target is examined
If a target is not examined, command vector_catch crashes while accessing
the debug_ap NULL pointer.

maskisr and reset_config commands don't require this check.

Change-Id: I949b6f6e8b983327dd98fbe403735141f8f0b5d6
Signed-off-by: Daniel Trnka <daniel.trnka@gmail.com>
Reviewed-on: http://openocd.zylin.com/5813
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-10-03 11:21:33 +01:00
Mete Balci
d7d70c2719 target/aarch64: a64 disassembler
Add A64 (AArch64) Disassembler using Capstone framework.

Change-Id: Ia92b57001843b11a818af940a468b131e42a03fd
Signed-off-by: Mete Balci <metebalci@gmail.com>
[Antonio Borneo: Rebased on current HEAD]
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5004
Tested-by: jenkins
2020-10-03 11:21:15 +01:00
Marc Schink
67008e1bea Use capstone for ARM disassembler
Change-Id: I1c9bf3f8178d4a06babe23a918e4411833ebc418
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/4812
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-27 17:39:44 +01:00
Tarek BOCHKATI
762ddcb749 cortex_m: add detection of Cortex M35P and M55
Change-Id: I52599b2b09c2dc50c95d64059213c832d380ea31
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5799
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-20 14:35:48 +01:00
Tarek BOCHKATI
f2c83fade3 cortex_m: read and display core security state
Change-Id: I0fce3c66af7e98df2dc2258daf0d6af661e29ae7
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5798
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-20 14:35:44 +01:00
Tarek BOCHKATI
6e33947899 armv8-m: add SecureFault exception
Change-Id: I4e1963631e834b6334bc917e956c2db4464b7b08
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5797
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-20 14:35:04 +01:00
Antonio Borneo
3934483429 target: avoid checking for non NULL pointer to free it
The function free() can be called with a NULL pointer as argument,
no need to check the argument before. If the pointer is NULL, no
operation is performed by free().

Remove the occurrences of pattern:
	if (ptr)
		free(ptr);

In target/openrisc/jsp_server.c, an error is logged if the ptr was
already NULL. This cannot happen since the pointer was already
referenced few lines before and openocd would have been already
SIGSEGV in that case, so remove the log.

Change-Id: I290a32e6d4deab167676af4ddc83523c830ae49e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5809
Tested-by: jenkins
2020-09-05 20:47:11 +01:00
Stafford Horne
a098a14eb5 openrisc: Fix segv jsp due to free of unallocated data
The prompt pointer in the jtag serial port is never zero'd or allocated.
Completely remove it since there is not much use for it as the target
software will provide the actual prompt.

Change-Id: Id95d8ccb9f725e53b9d03386b11d91eba1cd6ef4
Signed-off-by: Stafford Horne <shorne@gmail.com>
Reviewed-on: http://openocd.zylin.com/4093
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-05 18:11:54 +01:00
Antonio Borneo
f788949651 openocd: fix command's usage string
The usage string should contain only the command parameters.
OpenOCD will automatically prepend the command name to the usage
string while dumping the usage or help message.

Remove the repeated command name from the usage string.

Change-Id: If10a0f1c254aee302b9ca08958390b7f21cdb21b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5824
Tested-by: jenkins
2020-09-05 17:13:10 +01:00
Antonio Borneo
42faa8a4bc target/arc: fix command's usage string
The usage string should contain only the command parameters.
OpenOCD will automatically prepend the command name to the usage
string while dumping the usage or help message.

Remove the repeated command name from the usage string.

Change-Id: I691094a6395acb0e4ea3bea2347ff38379002464
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5822
Tested-by: jenkins
2020-09-05 17:13:00 +01:00
Antonio Borneo
99add6227f target: use proper format with uint32_t
Modify the format strings to properly handle uint32_t data types.

While there, fix prototype mismatch between header and C file of
the function armv7a_l1_d_cache_inval_virt().

Change-Id: I434bd241fa5c38e0c15d22cda2295097050067f5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5818
Tested-by: jenkins
2020-09-05 17:12:39 +01:00
Antonio Borneo
47d29ebe11 adi_v5: use macro DP_APSEL_MAX to allocate struct adiv5_ap
Commit 11019a824d ("adi_v5: enforce check on AP number value")
introduces the macro DP_APSEL_MAX and use it in place of hardcoded
magic numbers for the upper limit of AP selection value.

Use the macro also while defining the array of struct adiv5_ap in
struct adiv5_dap.

Change-Id: I88f53ceb710f92a48a8026a365709fbf2d9e6912
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5806
Tested-by: jenkins
2020-09-05 17:11:11 +01:00
Samuel Obuch
3ac010bb9f Fix debug prints when loading to flash
While loading to flash with debug level at least 3,
OpenOCD tries to print the whole loaded bitstream.
This will be very-very-slow due to implementation of
conversion from buffer to string.

* fix condition on selected debug level in jtag/core.c
* replace slow buf_to_str function from helper/binarybuffer.c
  with faster but_to_hex_str function

Change-Id: I3dc01d5846941ca80736f2ed12e3a54114d2b6dd
Signed-off-by: Samuel Obuch <sobuch@codasip.com>
Reviewed-on: http://openocd.zylin.com/5800
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-09-05 16:48:08 +01:00
Antonio Borneo
cd06642314 target: fix memory leaks on target_create() fail
There are failure cases of target_create() that are not checked.
Plus, in case of failure the memory allocated in not properly
released before returning error.

Check all the possible failure in target_create().
Change current_target only when target is successfully created.
Add the new target to all_targets list only when target is
successfully created.
Release all the allocated memory before quit on failure.
Use malloc() instead of calloc() for target->type, because the
struct will be fully populated with memcpy().

Change-Id: Ib6f91cbb50c28878e7c73dc070b17b8d7d4e902f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5776
Tested-by: jenkins
2020-08-08 22:17:43 +01:00
Mikhail Rasputin
6d45e485f9 target: fix registers reading from non examined target
If a target is not examined when the debugger tries to connect to it
then it can lead to undesired/undefined behavior.

In particular it leads to a zero pointer dereference on the aarch64.


Change-Id: I67f2b714ab8b2727fd36f3de16d7f9017b4c55fe
Signed-off-by: Mikhail Rasputin <mikhail.godlike.rasputin@yandex.ru>
Reviewed-on: http://openocd.zylin.com/5727
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-08-08 22:17:08 +01:00
Antonio Borneo
7c66df13ef target/arm11: fix memory leaks, including register cache
There is no deinit_target method, so few memory allocations leak
at openocd exit.
Issue identified by tracking all calls to arm_dpm_setup().

Implement the method arm11_dpm_deinit() to free all the memory
allocated in arm11_dpm_init() and call it in the new
arm11_deinit_target().

NOT TESTED on real HW.

Change-Id: Icab86e290fc2db14f70eb84c8286357aadb02a35
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5694
Tested-by: jenkins
2020-08-02 10:48:52 +01:00
Antonio Borneo
768502403e target: use one second timeout while halting target at gdb attach
By default GDB timeouts after 2 seconds, even if this value can be
modified with GDB command "set remotetimeout".
On OpenOCD side, the default event for GDB attach is to halt the
target and wait it to halt. But here the default timeout of the
halt command is 5 seconds!
If the target cannot be halted (e.g. it's kept in reset by another
core or the debugger doesn't have enough privileges) then GDB will
timeout while OpenOCD is still waiting and is unable to
communicate with GDB.

Decrease the halt timeout to 1 second in the default GDB attach
event handler.

Change-Id: I231c740816bb6a0d74b0bc679a368a6cbfb34824
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5687
Tested-by: jenkins
2020-08-02 10:48:41 +01:00
Antonio Borneo
480ba8ca88 target: fix minor typos and duplicated words
Change-Id: I8deb0017dc66a243e3dd51e285aa086db500decd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5766
Tested-by: jenkins
2020-07-26 23:09:45 +01:00
Antonio Borneo
f5cc8360fd target/arm720t: fix memory leak of register cache
There is no method to free the register cache, allocated in
arm720t_init_target().
Issue identified by tracking all calls to arm7tdmi_init_target().

Implement the method arm720t_deinit_target() by calling directly
arm7tdmi_deinit_target().

NOT TESTED on a real arm720t target.
Tested on a arm926ejs (SPEAr320) by hacking the target type and
pretending it is a xscale:
	sed -i s/arm926ejs/arm720t/ tcl/target/spear3xx.cfg

Change-Id: I53c1f46c1a355a710e8df01468b19220671569dc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5697
Tested-by: jenkins
2020-07-26 20:12:56 +01:00
Antonio Borneo
19aa77cc7f target/arm7tdmi: fix memory leak of register cache
There is no method to free the register cache, allocated in
arm7tdmi_init_target(), so we get a memory leak.
Issue identified by tracking all calls to arm_build_reg_cache().

Implement the method arm7tdmi_deinit_target() that in turn calls
arm7tdmi_free_reg_cache().

NOT TESTED on a real arm7tdmi target.
Tested on a arm926ejs (SPEAr320) by hacking the target type and
pretending it is a arm7tdmi:
	sed -i s/arm926ejs/arm7tdmi/ tcl/target/spear3xx.cfg

Change-Id: Iad465b708eb4ebb298725d7155fea76357e9045c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5696
Tested-by: jenkins
2020-07-26 20:12:48 +01:00
Antonio Borneo
df1dcc27ee target/xscale: fix memory leak of register cache
There is no method to free the register cache, allocated in
xscale_build_reg_cache(), so we get a memory leak.
Issue identified by tracking all calls to arm_build_reg_cache().

Implement the method xscale_deinit_target() that in turn calls the
new xscale_free_reg_cache().
Fix leak of struct xscale.

NOT TESTED on a real xscale target.
Tested on a arm926ejs (SPEAr320) by hacking the target type and
pretending it is a xscale:
	sed -i s/arm926ejs/xscale/ tcl/target/spear3xx.cfg

Change-Id: Ibb2104c42411b76f4bb77c2fa387d1b85a3d2d5d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5695
Tested-by: jenkins
2020-07-26 20:12:34 +01:00
Antonio Borneo
580b8f5da0 target: fix memory leaks on targets based on arm9tdmi
Similarly to the fix for arm926ejs (also base on arm9tdmi), fix
the other targets based on arm9tdmi.
The fix for arm926ejs is tested on SPEAr320 target.

This fix is proposed separately because is not tested on a correct
target device, but tested on SPEAr320 by hacking the target type
and pretending it is the correct one, e.g.:
	sed -i s/arm926ejs/arm920t/ tcl/target/spear3xx.cfg

The memory leaks detected and fixed are:
- arm register cache;
- EmbeddedICE register cache;
- arm_jtag_reset_callback internal data;
- struct <target_type>_common.

Change-Id: I565f9a5bf144a9df78474434d86a64127ef0fbe5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5699
Tested-by: jenkins
2020-07-26 20:12:21 +01:00
Jiri Kastner
2f40d069a1 src/target/arm_adi_v5.c: add Cortex-A35 related entries
ROM Table registers:
https://developer.arm.com/documentation/100236/0100/debug/rom-table/rom-table-peripheral-identification-registers
Debug reisters:
https://developer.arm.com/documentation/100236/0100/debug/memory-mapped-debug-registers/external-debug-peripheral-identification-registers
PMU registers:
https://developer.arm.com/documentation/100236/0100/debug/pmu-registers/performance-monitors-peripheral-identification-registers
CTI registers:
https://developer.arm.com/documentation/100236/0100/debug/cti-registers/cti-peripheral-identification-registers

Change-Id: Ibd57d91fb9b66bc46929f4e93d0bf23c2a32f11a
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/5773
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2020-07-26 20:10:40 +01:00
Jiri Kastner
765c319277 src/target/arm_adi_v5.c: resorted ids
Change-Id: Ieeccf48254032244a86d6cd35793f8f6076527e9
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/5772
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-26 20:09:30 +01:00
Evgeniy Didin
8fea8460db target/arc: Introduce Actionpoints support
Actionpoint mechanism allows to setup HW breakpoints and watchpoints on Synopsys ARC CPUs.
This mechanism is controlled by DEBUG register and by a set of auxilary registers.
Each actionpoint is controlled by 3 aux registers: Actionpoint(AP) match mask(AP_AMM),
AP match value(AP_AMV) and AP control(AC).

Note: some fields of actionpoint_t structure will be used in further
support of watchpoints.

Change-Id: I4efb24675f247cc19d9122501c9e63c3126fcab4
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5763
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-07-26 20:08:21 +01:00
Antonio Borneo
996ff5bcfc coding style: add arguments to function prototypes
Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types FUNCTION_ARGUMENTS -f {} \;

This patch also fixes an incorrect function prototype in zy1000.c.
ZY1000 minidriver implementation overrides the function
arm11_run_instr_data_to_core_noack_inner(), but the prototype is
not the same as in src/target/arm11_dbgtap.c and to avoid compile
error it was changed also the prototype of the called function
arm11_run_instr_data_to_core_noack_inner_default().

Change-Id: I476cda8cdb0e1e280795b3b43ca95c40d09e4a3d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5630
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-07-08 22:08:19 +01:00
Antonio Borneo
e2315ccffd coding style: fix space separation
The checkpatch script from Linux kernel v5.1 complains about using
space before comma, before semicolon and between function name and
open parenthesis.
Fix them!

Issue identified using the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types SPACING -f {} \;

The patch only changes amount and position of whitespace, thus
the following commands show empty diff
	git diff -w
	git log -w -p
	git log -w --stat

Change-Id: I1062051d7f97d59922847f5061c6d6811742d30e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5627
Tested-by: jenkins
2020-07-08 22:08:08 +01:00
Antonio Borneo
bf34629294 coding style: fix print of hex values as decimal
It is an error to prefix with "0x" the print of values in decimal.
Replace the incorrect decimal format specifier with PRIx32.

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types PRINTF_0XDECIMAL -f {} \;

Change-Id: I2eb867ef654527b2737ba573a405ec8f97c6a739
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5624
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-07-08 22:07:56 +01:00
Antonio Borneo
f29d157882 target/arm926ejs: fix memory leaks
The memory leaks detected and fixed are:
- arm register cache;
- EmbeddedICE register cache;
- arm_jtag_reset_callback internal data;
- struct arm926ejs_common.

Issue identified with valgrind.
Tested on SPEAr320 based on arm926ejs.

Change-Id: If2bed02c516051ce4d0eb29b204a3f3337fe5d6a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5698
Tested-by: jenkins
2020-07-08 22:07:38 +01:00
Antonio Borneo
7c88e76a76 target: do not print an error on shutdown in target events
Before commit b3ce5a0ae5 ("target: use LOG_USER to print errors
in events") an error in an event handler was silently lost, while
now the associated message is printed out.

A "shutdown" command in a target event (e.g. in gdb-detach) causes
the event to end with error code ERROR_COMMAND_CLOSE_CONNECTION,
that triggers the error message:
	shutdown command invoked
	Error executing event <event-name> on target <target-name>:

The error code returned by the command "shutdown" is required to
stop the execution in a script/proc and avoid executing any
further command in the script/proc.
It is then normal to get an error code from the "shutdown" command
and it should not be printed out.

Intercept the return code of the event in case of "shutdown", then
skip scheduling other target events and return without printing
the incorrect error message.

Change-Id: Ia3085fb46beacb90a5e4bf0abf7c6e28bb9e6a9b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Laurent Lemele <laurent.lemele@st.com>
Reviewed-on: http://openocd.zylin.com/5710
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
2020-06-27 15:34:51 +01:00
Evgeniy Didin
057aed11a2 target/arc: Introduce L1I,L1D,L2 caches support
With this commit we introduce L1 and L2 cache
flush and invalidate operations which are necessary for
getting/setting actual data during memory r/w operations.

We introduce L2 cache support, which is not presented
on currently support EMSK board. But L2 is presented
on HSDK board, which soon will be introduced.

Change-Id: I2fda505a47ecb8833cc9f5ffe24f6a4e22ab6eb0
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5688
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-27 15:34:24 +01:00
Lucas
2e6904eef5 aarch64: Add support for debugging in HYP mode on ARMv8-A cores
When debugging an ARMv8-A/AArch32 target running HYP mode, OpenOCD would
throw the following error to GDB on most operations (step, set breakpoint):

	cannot read system control register in this mode

The mode in question is 0x1A, a privilege level 2 mode available on cores
that have the virtualization extensions (such as the Raspi 3).

Note: this mode is only used when running in AArch32 compatibility mode.

Signed-off-by: Lucas Jenss <public@x3ro.de>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Change-Id: Ia8673ff34c5b3eed60e24d8da57c3ca8197a60c2
Reviewed-on: http://openocd.zylin.com/5255
Tested-by: jenkins
Reviewed-by: Lucas Jenß <lucas.jenss@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-27 15:33:57 +01:00
Marc Schink
5a79481d3b target/armv7m_trace: Calculate prescaler for external capture devices
This fixes a regression introduced in "2dc88e1479f29ef0141b05bfcd907ad9a3e2d54c"

Change-Id: I04dc19ed30118a4c499b83732700b2ee0fdb67b6
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5610
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-06-18 10:11:02 +01:00
Antonio Borneo
f0909fe9e5 coding style: fix multi-line dereferencing
Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types MULTILINE_DEREFERENCE -f {} \;

Change-Id: Icba05613e22a72ecc3e6a0aad7cb6b479496146f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5629
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-06-06 18:06:05 +01:00
Antonio Borneo
6f88aa0fb3 target/cortex_a: fix memory leak of register cache
There is no method to free the register cache, allocated in
armv4_5, so we get a memory leak.
Issue identified by valgrind.

Implement the method arm_free_reg_cache() and call it in cortex_a
deinit and to exit for error during arm_dpm_setup().
Tested on dual cortex-A stm32mp15x.
This change is inspired from similar fix in commit b01b5fe13a
("armv7m: Fix memory leak in register caching.").

The same allocation is also used by target types "arm7tdmi",
"arm9tdmi", "arm11" and "xscale" but they all lack the deinit
method and I do not have relevant HW to test the fix. For such
reasons they are not addressed in this patch.

Change-Id: I4da1e1f12e36ec245d1f3b11a4eafcbd9a1d2e25
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5693
Tested-by: jenkins
2020-06-06 18:05:29 +01:00
Antonio Borneo
061cae171c target/mem_ap: fix two memory leaks
The target mem_ap misses the method 'deinit_target' and does not
free the memory allocated during 'target create' and 'configure'.

Add the missing method and free the allocated memory.
Issue identified with valgrind.

Change-Id: If0d0114a75dd76a8b65c2d46d96c6085fd31a09d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5700
Tested-by: jenkins
2020-06-06 18:05:08 +01:00
Antonio Borneo
37330f89d7 target/cortex-m: enable C_DEBUGEN during examine
Current code for Cortex M does not set C_DEBUGEN as soon as
possible, (which means during target examine), but later-on either:
1) at command 'halt' (e.g. for 'gdb-attach' event);
2) at command 'soft_reset_halt';
3) at commands 'reset', 'reset halt' or 'reset init';
4) during polling, but only if the target:
    = enter in 'double fault', or
    = exit from a reset, or
    = halts (not possible if C_DEBUGEN is not set)

Plus, if commands in 1) or 2) are executed before the very first
poll of the target, the value of 'cortex_m->dcb_dhcsr' is used not
initialized while writing it back in DCB_DHCSR.

Another side effect of this situation is that it's possible to set
a HW breakpoint with the target running, while C_DEBUGEN is not
set. Accordingly to [1], C1.3.1 "Debug authentication":
    When DGBEN is LOW and DHCSR.S_HALT == 0:
    ...
    FPB breakpoints do not generate an entry to Debug state and,
    if no DebugMonitor exception is generated, will escalate to
    HardFault, Lockup, or be ignored.
On STM32MP15x I get HW breakpoint ignored, while on STM32F411 I
get HardFault.
E.g. following these steps:
- power-on a pre-flashed board that starts running the firmware;
- connect openocd, without halting or resetting the board;
- set a HW breakpoint to some address often executed;
- wait, but the board doesn't halt ...;
- type the command 'halt';
- if the Cortex-M has HardFault it would be visible and the fault
  is at the breakpoint address;
- if no HardFault then type the command 'resume';
- wait and the board will finally halt at the HW breakpoint.

A similar issue has been detected on Cortex-A code and fixed by
commit bff87a7f28 ("target/cortex_a: enable DSCR_HALT_DBG_MODE
during examine").
Follow the same approach and set C_DEBUGEN during examine.
Also, initialize 'cortex_m->dcb_dhcsr' during examine.

[1] ARM DDI 0403E "ARM v7-M Architecture Reference Manual"

Change-Id: I5b0b23403634f7dfce38f104bba9f59c33eb3e99
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5702
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Moritz Fischer <moritzf@google.com>
2020-06-06 18:04:36 +01:00
Tarek BOCHKATI
2d3bbcd566 arm_adi_v5: dap_ti_be_32_quirks_command minor simplification
use handle_command_parse_bool within dap_ti_be_32_quirks_command to make
it shorter and simpler.

Change-Id: Ice179cc477933b27e27235dc2ade23fe655e233d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5708
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-06 18:03:12 +01:00
Tarek BOCHKATI
cdb6918c87 arm_adi_v5: enhance command error reporting
avoid the usage of ERROR_COMMAND_SYNTAX_ERROR when
ERROR_COMMAND_ARGUMENT_INVALID is more adequate.

Change-Id: Ic9aaedb93fedd45efee1b39f8ea20185f01af2da
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5654
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-06-06 18:02:21 +01:00
Antonio Borneo
3b5a24c13b openocd: properly use jim data types
The jim library exports all the data types through typedef, so
there is no need to use the internal struct types.

Fix the few remaining inconsistencies in the code.

Change-Id: Id4ae0083563ea7a371833374e7b39f17158f66a4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5662
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-24 21:36:43 +01:00
Ake Rehnman
2bc24c06d3 stm8 target: make adapter speed settings work
Previously the adapter speed settings were hard-coded to
connect with low speed then switch over to high speed
regardless what was mentioned in the cfg files. Now the
stm8 target intercept adapter speed settings and configure
the stm8 control registers accordingly.

Change-Id: I7419514e5214e4b43b9d51253cf5b7f04a233533
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/5548
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-24 21:34:48 +01:00
Antonio Borneo
ac05f929ed swim: fix adapter speed handling
SWIM transport only supports two adapter speeds:
- "low speed"  equal to 363 kHz (8 MHz / 22)
- "high speed" equal to 800 kHz (8 MHz / 10)

Replace the previous convention that use "0" or "1" for "low" or
"high" speed with the effective speed in kHz.
Rework the implementation of stlink_speed_swim().
Set low speed in the stm8 config files, because only low speed is
permitted at debug connection; the previous code ignores the
initial value.

Change-Id: I2484c9419a2c554c59eb6b9216339393ab0b54f3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5529
Tested-by: jenkins
2020-05-24 21:31:21 +01:00
Antonio Borneo
ac18e960ce swim: abstract the transport in stm8 target
SWIM is implemented by (ab)using the HLA API. This was acceptable
when OpenOCD code did not provided a clear separation between
transports and related APIs. Still today SWIM in OpenOCD is only
supported by STLink, so the decision to re-use the HLA API was the
simpler way to implement it.
After commit efd1d64222 ("adapter: switch from struct
jtag_interface to adapter_driver") the transports API are better
split and SWIM can be implemented as a separate set of API. This
would open the possibility to extend OpenOCD for other adapters
that provide SWIM, e.g. versaloon, or through SPI emulation [1].

Introduce a new set of files swim.[ch] to handle the SWIM API.
Beside the API that almost match the transport low-level data
communication (system_reset, read_mem, write_mem), add a further
API reconnect. Today, inside HLA STLink code, the reconnect is
implemented by hacking the HLA API state(). Please notice that
due to this hack the return type is incorrect; stlink_usb_state()
returns ERROR_OK in SWIM mode, while its return type is enum
target_state. Ignore the type mismatch and still call the HLA API
state in the new SWIM API reconnect. Further commit will fix it.

[1] http://kuku.eu.org/?projects/stm8spi/stm8spi

Change-Id: I52018e1e2200cbd41af8e5031f7b35dc761b61d6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5528
Tested-by: jenkins
2020-05-24 21:29:42 +01:00
Tarek BOCHKATI
ac870d80a9 arm_disassembler: fix typo 'ARM_UNKNOWN_INSTUCTION' to '.._INSTRUCTION'
Change-Id: I3a3d566fe96fb1497cf8337389e993e0f728a64b
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5657
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-24 21:26:47 +01:00
Antonio Borneo
11c5efd2ec target/arc: fix build with clang
Commit da41bce3ae ("target/arc: introduce breakpoint
functionality") introduces a mismatch between the format string
and one int constant.

Change the format string to match the int constant.

Change-Id: I0d59552205551b90e165c0a2e3fef247ad0c7701
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: da41bce3ae ("target/arc: introduce breakpoint functionality")
Reviewed-on: http://openocd.zylin.com/5655
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-05-14 20:28:24 +01:00
iosabi
dadf46f618 cortex_m: make bit fields in cortex_m unsigned.
Expression like (0xffff << 16) evaluate to type int, which is not able
to hold that value, producing a warning when compiling with
-fsanitize=undefined. This patch makes most of the cortex_m constants
unsigned using the BIT() macro or appending "ul" when possible to fix
the undefined behavior warning.

Signed-off-by: iosabi <iosabi@protonmail.com>
Change-Id: I7af194305ef612d7a32e74eaf9f11dd85fa87f32
Reviewed-on: http://openocd.zylin.com/5583
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-05-12 06:05:45 +01:00
Antonio Borneo
59cc1f6629 coding style: open function's brace at beginning of new line
Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types OPEN_BRACE -f {} \;

Change-Id: I6d1356ed11e2699525f384efb7556bc2efdc299f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5628
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
2020-05-09 14:41:31 +01:00
Antonio Borneo
e41c3f78d1 coding style: wrap lines longer than 120 chars
The coding style is quite permissive allowing 120 chars per line,
but abuses are still present.
Fix them, wrapping the lines.

Change-Id: I94d66b651d759a60ec35f7ba115c43933e70ed69
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5626
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-05-09 14:40:52 +01:00
Antonio Borneo
1946b50dba coding style: let "else" follow the close brace
The statement "else" should not be on a new line when follows a
close brace '}'. Fix it!

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types ELSE_AFTER_BRACE -f {} \;

Change-Id: I8af247ec3f75a69713d7cb1e73881254d16c189e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5623
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:40:14 +01:00
Antonio Borneo
185834ef8a coding style: add missing space when split strings
Long strings are split across few lines; usually split occurs at
the white space between two words.
Check that the space between the two words is still present.
While there, adjust the amount of space between words.

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types MISSING_SPACE -f {} \;

Change-Id: I28b9a65564195ba967051add53d1c848c7b8fb30
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5620
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:39:44 +01:00
Antonio Borneo
4f459660a9 coding style: avoid unnecessary line continuations
Line continuation, adding a backslash as last char of the line, is
requested in multi-line macro definition, but is not necessary in
the rest of C code.

Remove it where present.

Identified by checkpatch script from Linux kernel v5.1 using the
command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types LINE_CONTINUATIONS -f {} \;

Change-Id: Id0c69e93456731717a7b290b16580e9f8ae741bc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5619
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:39:29 +01:00
Antonio Borneo
e66bb9d312 coding style: add parenthesis around the argument of sizeof
The script checkpatch available in new Linux kernel offers an
experimental feature for automatically fix the code in place.
While still experimental, the feature works quite well for simple
fixes, like parenthesis.

This patch has been created automatically with the script under
review for inclusion in OpenOCD, using the command:

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types SIZEOF_PARENTHESIS --fix-inplace -f {} \;

Change-Id: I8adb325bdb0e13211f8bae8b4770ec1979c176bf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5618
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:39:19 +01:00
Antonio Borneo
9b29cb58ac coding style: remove useless break after a goto or return
In a switch/case statement, a break placed after a goto or return
is never executed.
The script checkpatch available in Linux kernel v5.1 issues a
warning for such unused break statements.
In the process of reviewing the new checkpatch for its inclusion
in OpenOCD, let's get rid of these warnings.

The script checkpatch is unable to fixup automatically this case.
Thanks to having "break" command using a single code line, this
patch has been generated using the script below:

	find src/ -type f -exec ./tools/scripts/checkpatch.pl -q \
	 --types UNNECESSARY_BREAK -f {} \; \
	| sed -n '/^#/{s/^.*FILE: //;s/:$//;s/:/ /;p}' \
	| awk 'function P() {print "sed -i '\''"b"'\'' "a};
	       {
	         if ($1!=a) {
	           if (a) {P()};
	           a=$1;
	           b=$2"{d}";
	         } else {
	           b=b";"$2"{d}"
	         }
	       };
	       END {P()}'

Change-Id: I56ca098faa5fe8d1e3f712dc0a029a3f10559d99
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5617
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2020-05-09 14:39:05 +01:00
Evgeniy Didin
da41bce3ae target/arc: introduce breakpoint functionality
With this patch we introduce set/unset breakpoints
routines and add/remove bp handlers.
Currently soft breakpoints are only supported.

Changes since v1:
* Change if-statement in arc_remove_breakpoint
* Squash changes from http://openocd.zylin.com/#/c/5641/
  in this commit to fix build.

Change-Id: Ib10ccdb02fd1606e4f407f012b1bee106a8ffccd
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5641
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-05-08 21:23:05 +01:00
Evgeniy Didin
c693508f77 target/arc: introduce arc_read/write_instruction functions
This commit introduces helper instruction read/write functions
for further bp functionality.

Change-Id: I619fbe2870ef6365c29ed1618bb83b6f7eb84690
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5640
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-05-08 15:09:46 +01:00
Evgeniy Didin
0af37282c7 target/arc: Add initial stepping functions
Change-Id: I84845f2ec6f1cff975990f0a495165a02de33227
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5643
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-05-08 05:57:12 +01:00
Tomas Vanek
e888fe3987 target/armv7m: cosmetic refactorization
Introduce a variable 'size' and reduce the number of dereferencing
*reg_list_size by using the variable.

Change-Id: I3bdf1485a4ed8e34435e8acb3efd0df8d802508c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5326
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-05-03 21:42:23 +01:00
Antonio Borneo
6572dd97b3 coding style: src: remove empty lines at end of text files
Empty lines at end of text files are useless.
Remove them.

Change-Id: Ibac9b36682d58f81e34ca2b51e6260e7d472fb0e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5172
Tested-by: jenkins
2020-05-02 15:40:21 +01:00
Kevin Burke
86cf8d9fb0 target/armv8: Add ARM target name on halt status
The CPU target name is added to the HALT status message so the user
can see which target halted at the designated program counter.

Tested on an Ampere eMAG8180 and Quicksilver silicon

Change-Id: I51e6f21296c85a822df28c5b7c4068e8ff66f29e
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/5571
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-24 17:39:41 +01:00
Tomas Vanek
ff9ee132e5 target/armv7m: minor fixes of target algo exit point check
Introduce a new ERROR_TARGET_ALGO_EXIT as currently used
ERROR_TARGET_TIMEOUT should be reserved for the timeout only.

Do not load PC directly from CPU HW as the register value
has already been cached.

Change-Id: I0d3630da41fd021676789dc12b52545cc0432ba8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5329
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-04-21 16:49:02 +01:00
Florian Fainelli
5c6e32612d Remove BUILD_TARGET64
BUILD_TARGET64 creates a larger test matrix and mostly gates the
building of the aarch64/armv8 target, make that unconditional, which
would help fixing any issues with 64-bit address types anyway.

Rebased by Antonio Borneo after commit 1fbe8450a9 ("mips: Add
MIPS64 support")

Change-Id: I219f62b744d540d9dde9a42e6b63fd7d91df3dbb
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5240
Tested-by: jenkins
2020-04-21 12:55:41 +01:00
Evgeniy Didin
ea4f98046f target/arc: remove saving context during reset
In arc_poll() function we handle the cases, when jtag indicates, that
processor is halted, but target->state is not TARGET_HALTED.
In case, when processor was halted and target->state was TARGET_RUNNING,
we should save context. At the same time if target->state was TARGET_RESET
we do not need to save context.

Changes: 16.04:
Fix - Move setting target->state = TARGET_HALT after
"target->state == TARGET_RUNNIG" check, otherwise
this check makes no sense

Change-Id: I92ab6ec71cf58273bb8401d14a562035de3deab4
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5524
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-04-20 18:22:53 +01:00
Antonio Borneo
17ac52360f cortex_m: remove deprecation for soft_reset_halt
The command "soft_reset_halt" is deprecated since mid 2013 with
the commit 146dfe3295 ("cortex_m: deprecate soft_reset_halt").
Nevertheless it is still extremely useful with multicore chips
where it allows to reset only one of the cores, option not
available through asserting the chip-wide srst.
It also get useful to handle the reset on some problematic chip,
as in http://openocd.zylin.com/5489

Replace the warning about deprecation with a more light debug
message.

Change-Id: I52de6359475ba31014ae77e596a87fe88b252177
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5514
Tested-by: jenkins
Reviewed-by: Edward Fewell <efewell@ti.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-04-12 22:03:22 +01:00
Antonio Borneo
4873503ae4 cortex_a: don't wait for target halted in deassert_reset()
The tcl script src/target/startup.tcl has already the proper
centralized support to wait for all targets to halt after the
command "reset halt". The extra wait in cortex_a_deassert_reset()
is not required.
This extra wait is also an issue for multi-core support, because
waiting for one core to halt can delay the halt request to the
other cores.

Replace the indirect call to cortex_a_halt(), that embeds the wait
for halt, with a low-level halt sequence.

The on-going work on the reset framework is compatible with this
change; in fact it keeps in startup.tcl the wait for targets to
halt, even if current code proposal for cortex_a simply removes
the function cortex_a_deassert_reset().

Change-Id: Ic661c3791a29ba7d520e31f85a61f939a646feb5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5472
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-04-12 22:03:00 +01:00
Jan Matyas
25efc15069 target: added events TARGET_EVENT_STEP_START and _END
Events TARGET_EVENT_STEP_START and TARGET_EVENT_STEP_END
have been added - analogous to already existing events
TARGET_EVENT_RESUME_*.

This is an example of a concrete use case where having
these events is important:

In RISC-V processors without Debug Program Buffer, OpenOCD
cannot execute fence/fence.i when resuming or single-
stepping. With these events implemented, the user can
instead provide custom operations to achieve that same
effect prior to resuming the processor.

Change-Id: I786348ff08940759d99b0f24e9e0ed5a44581094
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5551
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
2020-04-09 11:06:39 +01:00
Tarek BOCHKATI
4ce4aa752b armv8: log the register name which we failed to read or write
when openocd fails to read armv8 register, the user is not informed
which register has caused the error.

for example, in AArch32 state ESR_EL3 read/write is not supported,
thus armv8_dpm_read_current_registers is always failing without mentioning
which register has caused the error.

Change-Id: I24c5abbda9fac24fb77a01777ed15261aeaaf800
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5516
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-04-05 14:11:43 +01:00
Evgeniy Didin
f00070edaf target/arc_cmd: Improve argument checks for commands
Add more argument check for "add-reg" command.

Changes since first revision:
-Removed arguments limitation(50 maximum) for "arc_set_reg_exists".

Changes:
25.03:
Removed inconsistency in "add-reg" function. Actually
"-type" option is optional and if it is not set,
register type is "int".

Change-Id: Ia21e6baf4fbda162f7811cd0fe305fc86ddafcfd
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5523
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-27 07:09:41 +00:00
Marc Schink
5ceae0eef4 target: Add possibility to remove all breakpoints
Change-Id: I46acd57956846d66bef974e0538452462b197cd0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4916
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-26 19:30:45 +00:00
Marc Schink
9960e805b3 target: Add function to remove all breakpoints
Change-Id: I4718926844a2c8bcfd78d7a8792f6ded293548ef
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4915
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-26 19:30:34 +00:00
Marc Schink
aff486b6a0 rtos: Destroy RTOS and fix memory leak
The memory leak can be reproduced by using an arbitrary RTOS
and valgrind:

 $ valgrind --leak-check=full --show-leak-kinds=all

[...]
==9656== 224 (80 direct, 144 indirect) bytes in 1 blocks are definitely lost in loss record 3 of 3
==9656==    at 0x483CD99: calloc (in /usr/lib/x86_64-linux-gnu/valgrind/vgpreload_memcheck-amd64-linux.so)
==9656==    by 0x1C541A: os_alloc (rtos.c:79)
==9656==    by 0x1C569E: os_alloc_create (rtos.c:111)
==9656==    by 0x1C569E: rtos_create (rtos.c:153)
==9656==    by 0x1AE332: target_configure (target.c:4899)
==9656==    by 0x1AF228: jim_target_configure (target.c:4952)
==9656==    by 0x1C9EF9: command_unknown (command.c:1066)
==9656==    by 0x313284: JimInvokeCommand (jim.c:10364)
==9656==    by 0x313FB6: Jim_EvalObj (jim.c:10814)
==9656==    by 0x3154A3: Jim_EvalFile (jim.c:11207)
==9656==    by 0x316015: Jim_SourceCoreCommand (jim.c:15230)
==9656==    by 0x313284: JimInvokeCommand (jim.c:10364)
==9656==    by 0x313B8B: JimEvalObjList (jim.c:10605)
[...]

Change-Id: I2cd41a154fb8570842601ff4e3e76502f5908f49
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5479
Tested-by: jenkins
Reviewed-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-17 16:40:14 +00:00
Antonio Borneo
b5d2b1224f target/cortex_a: add hypervisor mode
Hypervisor mode is present only if the optional virtualization
extensions are available. Moreover, virtualization extensions
require that also security extensions are implemented.

Add the required infrastructure for the shadowed registers in
hypervisor mode.
Make monitor shadowed registers visible in hypervisor mode too.
Make hypervisor shadowed registers visible in hypervisor mode
only.
Check during cortex_a examine if virtualization extensions are
present and then conditionally enable the visibility of both
hypervisor and monitor modes shadowed registers.

Change-Id: I81dbb1ee8baf4c9f1a2226b77c10c8a2a7b34871
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5261
Tested-by: jenkins
2020-03-12 10:11:19 +00:00
Antonio Borneo
6900c5af4e armv7a: access monitor registers only with security extensions
Accordingly to ARM DDI 0406C at B1.5, the security extensions for
armv7a are optional extensions and can be detected by reading
ID_PFR1.
The monitor mode is part of the security extensions and the shadow
registers "sp_mon", "lr_mon" and "spsr_mon" are only present with
the security extensions.

Read the register ID_PFR1 during cortex_a examine, determine if
security extension is present and then conditionally enable the
visibility of the monitor mode shadow registers.

Change-Id: Ib4834698659046566f6dc5cd35b44de122dc02e5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5259
Tested-by: jenkins
2020-03-12 10:10:33 +00:00
Antonio Borneo
9626402c5a target/armv4_5: remove unused macro
The macro ARMV4_5_CORE_REG_MODENUM() is unused.
Remove it!

Change-Id: I183df57bd86c9428710ea3583e43fba88fd26e0a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5260
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2020-03-12 10:09:15 +00:00
Antonio Borneo
fba438fde7 arm: Use different enum for core_type and core_mode
The fields core_type and core_mode use the same enum arm_mode
but encode different information, making the code less immediate
to read.

Use a different enum arm_core_type for the field core_type.
The code behavior is not changed.

Change-Id: I60f2095ea6801dfe22f6da81ec295ca71ef90466
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5258
Tested-by: jenkins
2020-03-12 10:05:42 +00:00
Antonio Borneo
f447c31b30 arm: fix reg num for Monitor mode
Commit 2efb1f14f6 ("Add GDB remote target description support
for ARM4") inserts two additional registers "sp" and "lr" in the
table arm_core_regs[], thus shifting by two the position of the
last three registers already present
	"sp_mon" moved from index 37 to 39
	"lr_mon" moved from index 38 to 40
	"spsr_mon" moved from index 39 to 41
Part of the code is updated (e.g. enum defining ARM_SPSR_MON and
array arm_mon_indices[]), but it's missing the update of mapping
in armv4_5_core_reg_map[].

Fix armv4_5_core_reg_map[].

Change-Id: I0bdf766183392eb738206b876cd9559aacc29fa0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 2efb1f14f6 ("Add GDB remote target description support for ARM4")
Reviewed-on: http://openocd.zylin.com/5257
Tested-by: jenkins
2020-03-12 10:05:30 +00:00
Antonio Borneo
939febecca target: fix crash with jimtcl 0.78
The jimtcl commit 41c5ff1809f5 ("jim.c: Fix Object leak in zlib
support") https://repo.or.cz/jimtcl.git/commit/41c5ff1809f5
makes Jim_SetResultFormatted() freeing the parameters that have
zero refcount.

OpenOCD commit 559d08c19e ("jim tests: use installed") adds the
only code instance in OpenOCD that first passes a zero refcount
object to Jim_SetResultFormatted() and then frees it.
By switching jimtcl version to 0.78 or newer this causes a crash
of OpenOCD.
To trigger the crash in a telnet session, check that the current
target is running and type:
	[target current] arp_waitstate halted 1

Remove the call to Jim_FreeNewObj() after the call to
Jim_SetResultFormatted().

Change-Id: I5f5a8bca96a0e8466ff7b789fe578ea9785fa550
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5453
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-03-12 10:03:57 +00:00
Tarek BOCHKATI
221fe49879 semihosting: add semihosting handlers to AArch64
note: this works only when the PE is in AArch64 state

Change-Id: Id6a336ca7d201df72bd1aaaeccce4185473fc1bd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5474
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:48:56 +00:00
Matthias Welwarsky
afe899f938 cortex_a: warn on broken debug_base setting
A common problem with target configurations appears to be broken
debug base address configuration. ARM DDI0406C.d specifies in App. D,
1.4.1, that bit 31 of the debug base address serves as identification
of an external debugger, as opposed to an internal access to memory
mapped debug registers by the CPU. External accesses are treated
as privileged and require no debug authentification via the lock
access register.

Sometimes the base address of a debug component is wrong even
in the targets' ROM table. In this case, the correct base address
must be specified using the -dbgbase argument when creating the
target.

This patch adds a warning when bit 31 of the debug base address
is not set, as a hint to the user.

Change-Id: I9c41d85a138123c657ef655e3436a2aa39249dcc
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/5105
Tested-by: jenkins
Reviewed-by: Tommy Vestermark <tov@vestermark.dk>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:48:25 +00:00
Tarek BOCHKATI
a8b1bd8376 target/armv8_opcodes: use T32 instructions when the PE is in AArch32 state
As stated in ARM v8-A Architecture Reference Manual (ARM DDI 0487E.a)
in Chapter H4.3 DCC and ITR access modes:
    Writes to EDITR trigger the instruction to be executed if the PE
    is in Debug state:
      - If the PE is in AArch64 state, this is an A64 instruction.
      - If the PE is in AArch32 state, this is a T32 instruction

But in armv8_opcodes specifically in t32_opcodes we were using some
A32 instructions for HLT, LDRx and STRx opcodes.

Using the correct LDRx and STRx opcodes, fixes 16 and 8 bits memory access
when the PE is in AArch32 state.

Change-Id: Ib1acbdd4966297e7b069569bcb8deea3c3993615
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5346
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:47:08 +00:00
Tarek BOCHKATI
a154973896 target/aarch64: fix soft breakpoint when PE is in AArch32 state
Before this patch aarch64_set_breakpoint was using either A64, or A32
HLT opcode by relying on armv8_opcode helper.
This behaviors ignores the fact that in AArch32 state the core could
execute Thumb-2 instructions, and gdb could request to insert a soft
bkpt in a Thumb-2 code chunk.

In this change, we check the core_state and bkpt length to know the
correct opcode to use.

Note: based on https://sourceware.org/gdb/current/onlinedocs/gdb/ARM-Breakpoint-Kinds.html
      if bkpt length/kind == 3, we should replace a 32-bit Thumb-2 opcode,
      then we use twice the 16 bits Thumb-2 bkpt opcode and we fix-up the
      length to 4 bytes, in order to set correctly the bpkt.

Change-Id: I8f3551124412c61d155eae87761767e9937f917d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5355
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:46:43 +00:00
Tarek BOCHKATI
4845b54372 target/aarch64: fix minor stepping issue with gdb
when using step command from gdb the step happens without any issue,
but aarch64_step call explicitly aarch64_poll which consumes the
status change to HALTED, so it does not inform gdb that the step has
finished.

by removing this call, all is back to normal and openocd could inform gdb
that the step has finished.

Change-Id: I9366aecd20f7d52259b050b8653189b67d9299d0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5354
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:45:36 +00:00
Tomas Vanek
9f4659ae6b target: add examine-fail event
A configuration script may want to check the reason why examine fails
e.g. device has security lock engaged.

tcl/target/kx.cfg and klx.cfg is modified to use the new event
for testing of the security lock of Kinetis MCU

Change-Id: Id1d3a79d24e84b513f4ea35586cd2ab0437ff9b3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4289
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-03-12 09:43:55 +00:00
Tarek BOCHKATI
a99bf2ea94 semihosting: reorganize semihosting commands
the same semihosting handlers chain is declared twice:
 1. in src/target/armv4_5.c
 2. in src/target/riscv/riscv.c

to make it simpler we moved the declaration into
'src/target/semihosting_common.c' under semihosting_common_handlers[].
then we used this into both of armv4_5.c and riscv.c

Change-Id: If813b3fd5eb2476658f1308f741c4e805141f617
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5473
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Liviu Ionescu <ilg@livius.net>
2020-03-10 20:20:22 +00:00
Tomas Vanek
a2e822834d helper/binarybuffer: fix clang static analyzer warnings
Writing bits to an uninitialized buffer generated false warnings.
Zero buffers before setting them by buf_set_u32|64()
(do it only if bit-by-bit copy loop is used,
zeroed buffer is not necessary if a fast path write is used)

Change-Id: I2f7f8ddb45b0cbd08d3e249534fc51f4b5cc6694
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5383
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-03-07 15:30:05 +00:00
Tomas Vanek
4e981bc27c target/arm920t: fix clang static analyzer warning
Change-Id: I570dfb8b20a3f187f1fe660343cf0b75691e2c30
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5375
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-03-07 15:29:44 +00:00
Evgeniy Didin
39d54ee969 target/arc: fix clang static analyzer warnings
Fixes:
* Removed typo in *bitfields initializations.
* Removed potentional memory leak allocating
  reg_data_type_struct_field/reg_data_type_flags_field objects.
* Initialize buffers with "0" before usage in buf_set_u32().
* Removed memory leak in jim_arc_add_reg().

Change-Id: Iefde57cd4a48c4f3350c376475df8642607f52ff
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5480
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-29 15:58:21 +00:00
Evgeniy Didin
9ee9bdd2f9 Introduce ARCv2 architecture related code
This patch is an initial bump of ARC-specific code
which implements the ARCv2 target(EMSK board) initializing
routine and some basic remote connection/load/continue
functionality.

Changes:
03.12.2019:
-Add return value checks.
-Using static code analizer next fixes were made:
        Mem leak in functions:
                arc_jtag_read_memory,arc_jtag_read_memory,
                arc_jtag_write_registers, arc_jtag_read_registers,
                jim_arc_add_reg_type_flags, jim_arc_add_reg_type_struct,
                arc_build_reg_cache, arc_mem_read.
        Dead code in "arc_mem_read";
        In arc_save_context, arc_restore_context correct arguments
        in"memset" calls.
        In "build_bcr_reg_cache", "arc_build_reg_cache" check
        if list is not empty.

29.12.2019
-Moved code from arc_v2.c to arc.c
-Added checks of the result of calloc/malloc calls
-Reworked arc_cmd.c: replaced spagetty code with functions
-Moved to one style in if statements - to "if(!bla)"
-Changed Licence headers

22.01.2020
-Removed unused variables in arc_common
-Renamed register operation functions
-Introduced arc_deinit_target function
-Fixed interrupt handling in halt/resume:
        * add irq_state field in arc_common
        * fix irq enable/disable calls ( now STATUS32 register is used)
-Switched from buf_set(get)_us32() usage to target_buffer_set(get)_u32()
-Made some cleanup

30.01.2020
-Removed redundant arc_register struct, moved target link to arc_reg_desc
-Introduced link to BCR reg cache in arc_common for freeing memory.
-Now arc_deinit_target frees all arc-related allocated memory.
	Valgrind shows no memory leaks.
-Inroduced arch description in arc.c

01.02.2020
-Remove small memory allocations in arc_init_reg. Instead created reg_value
	and feature fields in arc_reg_desc.
-Add return value for arc_init_reg() func.
-Replaced some integer constants(61,62,63) with defines.
-Removed redundant conversions in arc_reg_get_field().
-Moved iccm/dccm configuration code from arc_configure()
	to separate functions.

19.02.2020
-Change sizeof(struct) to sizeof(*ptr) in allocations
-Changed if/while(ptr != NULL) to if/while(ptr)
-Removed unused variables from struct arc_jtag
-Add additional structs to arc_reg_data_type
 to reduce amount of memory allocations calls
 and simplifying memory freeing.
-Add helper arc_reg_bitfield_t struct which includes
 reg_data_type_bitfield object and char[] name. Reduces
 memory allocations calls.
-Add limit for reg_type/reg_type_field names(20 symbols).
-Add in jim_arc_add_reg_type*() functions additional
 argnument checks(amount of field/name size).
-In jim_arc_add_reg_type*() reduced amount of memory allocations.
-Cleanup of jim_arc_add_reg_type*() functions.
-For commands update ".usage" fields according docopt.
-Cleanup in arc_jtag.c
-Renamed functions which require jtag_exeutre_queue() to arc_jtag_enque_*()
-Add arc_jtag_enque_register_rw() function, which r/w to jtag ir/dr regs
 during regiter r/w.

24.02:
-Change include guards in arc* files according coding style
-Remove _t suffix in struct arc_reg_bitfield_t
-Some cleanup

Change-Id: I6ab0e82b12e6ddb683c9d13dfb7dd6f49a30cb9f
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5332
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-27 06:46:51 +00:00
Antonio Borneo
e7306d361b coding style: fix space around pointer's asterisk
The script checkpatch available in new Linux kernel offers an
experimental feature for automatically fix the code in place.
While still experimental, the feature works quite well for simple
fixes, like spacing.

This patch has been created automatically with the script under
review for inclusion in OpenOCD, using the command
	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types POINTER_LOCATION --fix-inplace -f {} \;
then manually reviewed.

OpenOCD coding style does not mention the space around pointer's
asterisk, so no check is enforced. This patch only makes the style
uniform across the files.

The patch only changes amount and position of whitespace, thus
the following commands show empty diff
	git diff -w
	git log -w -p
	git log -w --stat

Change-Id: Iefb4998e69bebdfe0d1ae65cadfc8d2c4f166d13
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5197
Tested-by: jenkins
2020-02-24 10:30:36 +00:00
Antonio Borneo
beb610555a adi_v5_dapdirect: fix connect under reset
Deassert the reset only if connect under reset is not required;
otherwise, assert the reset.
This fix aligns the behavior of connect under reset in dapdirect
with the behavior in jtag and swd.

Change-Id: I937ef4320b44e51ef6cb0e349e12348dbfbe4abb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5415
Tested-by: jenkins
2020-02-24 10:28:46 +00:00
Tomas Vanek
35f846fd52 target/adi_v5_swd: fix clang static analyzer warning
Change-Id: I24b3e74b62fad469e3150ad97a10a9ab69c2793b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5374
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-02-23 21:36:36 +00:00
Antonio Borneo
5481401514 armv8: check the core state to pass the correct arch to gdb
Commit 3799eded67 ("target/aarch64: add support for
multi-architecture gdb") passes the constant string "aarch64" as
architecture to gdb. This is not working if the core is running
in 32 bits mode; gdb reports:
	Truncated register 8 in remote 'g' packet
then closes the connection with OpenOCD.

Make the architecture string dependant from the current state of
the core.

Change-Id: I16e1614ea02ba29bf87f450b3dfe25c83c9a3612
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5234
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2020-02-15 15:38:39 +00:00
Antonio Borneo
8105c46ba5 coding style: remove unnecessary parentheses
Identified by checkpatch script from Linux kernel v5.1 using the
command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types UNNECESSARY_PARENTHESES -f {} \;

then fixed manually.

Change-Id: Ia2d9a0953d9b89fc87dc1195aa05c7f63c068c48
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5196
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-15 15:37:20 +00:00
Antonio Borneo
b5c883f298 target/nds32: fix type of magic number
The macro NDS32_COMMON_MAGIC was cast-ed to int to avoid compile
time error for comparison type mismatch while comparing it with
the field common_magic.
This is incorrect because the macro value is a 32 bit unsigned
value; better changing the type of the field common_magic to keep
the unsigned value.

Issue identified by checkpatch script from Linux kernel v5.1 using
the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types TYPECAST_INT_CONSTANT -f {} \;

Change-Id: Ib5924b6cecdffe70ab5c78d3b30a9c8e4deb7c7b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5193
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-02-15 15:36:56 +00:00
Oleksij Rempel
70babcc00b move ftdi_location deprecation helper to proper place
Change-Id: I927d4e918acbf321aea1dd7a8de95fbaa8fbbbf0
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/5278
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-01-29 05:35:36 +00:00
Tomas Vanek
dc95dd036f target/arm_cti: fix regression from Tcl_return_values series
Since commit 7f260f5009 native OpenOCD
command handlers should not directly use Jim_SetResult functions.
The Tcl result of a native command is built as concatenation of
command_print() strings and Jim_SetResult() is called after return
of the command handler.

Replace "wrong number of args" error messages (now not delivered to user)
by simply return ERROR_COMMAND_SYNTAX_ERROR

Change-Id: I40c1374a13859cefbdef68e0f1c13ab93538bd50
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5363
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-01-27 09:19:17 +00:00
Jiri Kastner
f98099507f mips_ejtag: there is no DCR.MIPS64 bit
available revisions (2.60, 3.10, 5.06 and 6.10) of
MD00047 (EJTAG specification), have only in IMPCODE
MIPS32/MIPS64 bit/flag.

Change-Id: If9191b6ced760c59bb7551bb041cd72b0a060bb1
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/4628
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2020-01-20 06:28:49 +00:00
Tomas Vanek
7fffa3cbc6 target/xscale: remove duplicated command
Reported by clang static analyzer.

Change-Id: I893af10852af4885507ed62d024008159a80dd56
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5382
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:46:38 +00:00
Tomas Vanek
af0dda8266 target/etm: add check for calloc error
and fix one more clang static analyzer warning.

Change-Id: I17f03e318e1cf7617e7f753e7ca960552be547e5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5381
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:46:27 +00:00
Tomas Vanek
fe6bb7eac8 target/semihosting_common: fix minor memory leak
Reported by clang static analyzer.

Change-Id: Ie663f49d92588c0d8b502cfdd8fc34004b308066
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5380
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:46:12 +00:00
Tomas Vanek
57afa176ce target/target: fix clang static analyzer warnings
Change-Id: I23e6586be60915f21a7179a994a1ec93fb9b2c36
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5379
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:45:58 +00:00
Tomas Vanek
b04d9c05f0 target/avr32_jtag: fix error returns
Fixed only 2 error returns discovered by clang static analyzer.
There are obviously many more missing error tests in avr32_jtag.c
These was not fixed to keep this change minimal.
Not tested with hw.

Change-Id: I6c79f6248db774990ddb42c0dacdb621651ed69e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5378
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:45:37 +00:00
Tomas Vanek
8bb1998e6a target/arm_dpm: add missing error returns
Discoverd by clang static analyzer.

Change-Id: I93d5de0a36216e62b170fe8cc870431226a7777f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5377
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:45:30 +00:00
Tomas Vanek
5dd5cf26bd target/arm946e: add missing error detection
Discoverd by clang static analyzer.
While on it remove useless type casts from arm946e_read_cp15() parameter.

Change-Id: I549e19685b431400243800ee0f7d1bbe6cdb14b4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5376
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-16 09:45:19 +00:00
Christopher Head
ed8fa09cff target/target: parse value as proper type
The `value` variable is passed into `target_fill_mem` as its
second-to-last parameter. That parameter is of type `uint64_t`. It is
appropriate to parse the value as that type, since otherwise a target
with a 32-bit address space but 64-bit data write capabilities would not
be able to exercise those capabilities.

Change-Id: Ib336d47d42c27cd2b5ba1206b04e8f740f167dba
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5219
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-01-14 11:41:11 +00:00
Antonio Borneo
944d3e6771 stlink: add DAP direct driver
STLINK-V3 and the new firmware V2J24 for ST-LINK/V2 provide API
to directly access the DAP registers.
This mode permits to use the native target in cortex_m.c, with no
need to override it with the target in hla_target.c.
Other advantages wrt HLA are: support for Cortex-A cores, support
for SoC multi-core and/or multi AP, support for OpenOCD commands
"dap" thus including control of CSW.
This obsoletes the existing HLA driver for ST-Link, that should
anyway be kept for those cases where it's not possible to update
the ST-Link firmware.

This commit introduces the minimal implementation for direct DAP
access. The implementation is much slower than the HLA because
every memory transfer requires several USB packets. Further
commits will close the performance gap.
The whole ST-Link driver is compiled under BUILD_HLADAPTER, to
remove the need to split the driver between the two modes. This
has to be reworked, but it's quite invasive!
A new interface file stlink-dap.cfg is added and should be used
in place of stlink.cfg to enable the DAP mode.
Documentation is updated and reports limitation on the maximum AP
number that can be accessed by ST-Link for some firmware already
tested.

Change-Id: I932ffe16bc81d00b1fe489e2944fda13470cce9b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4904
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:40:36 +00:00
Antonio Borneo
a61ec3c1d7 adi_v5_dapdirect: add support for adapter drivers that provide DAP API
Some high level adapters, like STLINK-V3 and new firmware for
ST-Link/V2, provide API to directly access the DAP registers
hiding the details of the physical transport JTAG or SWD.
OpenOCD has already the intermediate API in struct dap_ops that
are suitable for such adapters, but are not exposed to the
adapter drivers.

Add in struct adapter_driver two independent struct dap_ops for
the cases of physical JTAG and SWD transport.
Add new transport names "dapdirect_jtag" and "dapdirect_swd", to
be used by the drivers that provide one or both DAP API.
Add the necessarily glue in target/adi_v5_dapdirect.c

Change-Id: I2bb8e3a80fba750f2c218d877cfa5888428e3c28
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4903
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:40:25 +00:00
Antonio Borneo
efd1d64222 adapter: switch from struct jtag_interface to adapter_driver
To reorganize the adapters code, introduce an adapter_driver
struct that contains all the adapter generic part, while
keeping in two separate struct the specific API jtag_ops and
swd_ops.
Move the allocation of *adapter_driver from the JTAG-specific
file core.c to the more adapter-specific file adapter.c
While splitting the old jtag_interface for every driver, put
the fields in the same order as in the struct declaration so
we keep a consistent code across all the drivers.

While other transport specific API could/would be added as
separate ops, nothing is done here for HLA.

Change-Id: I2d60f97ac514c0dd2d93a6ec9be66fd9d388dad5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4900
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:39:37 +00:00
Antonio Borneo
0f24549ce9 hla: use the new system_reset API
HLA uses its own internal driver's API to control the adapter's
system reset, but at the same time it calls jtag_add_reset() to
avoid breaking the internal logic of OpenOCD. This implicitly
forces HLA to rely on jtag queue mechanism, even if HLA has no
link with JTAG state machine. It requires HLA to implement an
empty execute_queue() to comply with the JTAG queue.

Modify the HLA framework and the HLA targets to use the new
adapter API for system_reset and decouple HLA from JTAG queue.
Rename the HLA static functions adapter_assert_reset() and
adapter_deassert_reset() to avoid overlap with the global
functions with same name.
While there, fix a minor typo in a comment s/incase/in case/.

Do not remove from HLA the JTAG specific API execute_queue(),
even if not required anymore, because OpenOCD code still has
calls to jtag_execute_queue() in case of non JTAG transport.

Change-Id: I0e65e3e557bd665bd3d3aeaa84ea609b55a05e48
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4896
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:37:34 +00:00
Antonio Borneo
8850eb8f2c swd: get rid of jtag queue to assert/deassert srst
The transport SWD uses the JTAG queue to assert/deassert the
system reset srst. This is the major inconsistency that has to be
removed to properly split JTAG and SWD.

Introduce a new driver API, reset(), to controls both the signals
trst and srst in the driver, skipping the JTAG queue. Put the new
API in struct jtag_interface, even if in this patch it's used for
SWD only; the goal is to get it reused by the other transports.

Add the implementation of the API in all the drivers that
implement SWD. Such implementation is almost the same of the old
code in JTAG queue.

Create a wrapper adapter_system_reset() to use the new API and
remove the SWD specific swd_add_reset(). In the wrapper replace
jtag_add_sleep() with jtag_sleep(), because the former uses the
JTAG queue too.
Rename the old jtag_add_reset() as legacy_jtag_add_reset() with
the target to remove it when all drivers would be ported to the
new reset API. Create a new jtag_add_reset() that calls the
legacy function for drivers still on the old reset API.

Use the new API also on JTAG transport for the drivers that can
support both SWD and JTAG.

For the moment, do not modify the implementation of JTAG-only
drivers, which will continue using the usual method. This should
be cleaned-up in future commits.

Change-Id: I32331c88313f6059b25e12c6bb0156aebc1c074f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4895
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-14 11:15:12 +00:00
Antonio Borneo
be2d25efcc arm_adi_v5: add API send_sequence() and use it
The method to send an arbitrary sequence to DAP depends on the
transport and is thus different on JTAG and SWD. This is already
coded in dap_to_jtag() and dap_to_swd().

Add a new API send_sequence() in struct dap_ops.
Add the implementations of send_sequence() in adi_v5_jtag.c and
adi_v5_swd.c
Rewrite dap_to_jtag() and dap_to_swd() using the new API.
Move the enum swd_special_seq in arm_adi_v5.h to solve a circular
dependencies among swd.h and arm_adi_v5.h

Change-Id: I9db13a00f129761eab283783c094cfff2dd92610
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4902
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-01-02 21:24:54 +00:00
Tarek BOCHKATI
0750a7c085 target/arm_cti: add new 'ack' and 'channel' commands
these commands have been introduced to ease the manipulation of CTI trough
script files, these commands are:
 - $cti_name ack $event : to acknowledge a CTI event
 - $cti_name channel $channel_number $operation: to perform an operation
    on a specific channel, the possible operations are:
    gate, ungate, set, clear and pulse

Change-Id: I35463867a3c85072f3776c3aeb1e5788953ec435
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5315
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2020-01-02 21:19:27 +00:00
Marc Schink
2dc88e1479 target/armv7m_trace: Improve SWO frequency auto-detection
The SWO frequency auto-detection with J-Link adapters does not work
properly in the current implementation. This is because the trace layer
has only information about the highest possible SWO frequency supported
by the adapter. With that the trace layer calculates the SWO prescaler
which usually leads to a frequency deviation greater than what is
permitted by J-Link adapters.

Move the calculation of the SWO prescaler from the trace layer into the
trace configuration of the adapter to overcome this problem.
The adapter has the necessary information to choose a suitable SWO
frequency and calculate the corresponding prescaler that complies with
the maximum allowed frequency deviation.

Tested with:
  - STM32L152RC Discovery Kit (ST-Link)
  - EFM32GG-STK3700 (J-Link)

Change-Id: I38ff2b89d32f0a92c597989b590afe5c75cf4902
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3903
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-12-21 19:25:32 +00:00
Antonio Borneo
e8d4074cf8 target/armv4_5: use c99 array designator to init arm_core_regs[]
During code analysis and development, counting again and again the
lines to find the index of the register is a boring error-prone
brain-damaging activity.
Use the c99 syntax and add once forever the array designators to
specify the index values.
The code behavior is not changed.

Change-Id: I2c70f70794475679efb91a8dfadc00f50715bd3f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5256
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:42:41 +00:00
Antonio Borneo
f476c9eec4 gdb_server: fix string length with semihosting_fileio
The GDB file-I/O remote protocol extension, used for implementing
the semihosting file I/O, requires the length of strings to
include the trailing zero character, as explicitly stated inside a
comment in GDB source code [1]:
	/* 1. Parameter: Ptr to pathname / length incl. trailing zero.  */

ARM specification for semihosting [2] requires the string length
to not include the trailing zero character, e.g. in SYS_OPEN
specifications:
	"field 3: An integer that gives the length of the string
	 pointed to by field 1. The length does not include the
	 terminating null character that must be present."

The mismatch above requires OpenOCD to add "one" to the string
length before passing it to GDB. Such conversion is missing
either in the generic semihosting provider of the data, the
function semihosting_common(), and in the consumer of the data,
the gdb_server function gdb_fileio_reply().
The conversion is already implemented in the target specific
function nds32_get_gdb_fileio_info(), but it's not the preferred
place for such GDB specific requirement.

This issue affects the semihosting calls "open", "unlink",
"rename" and "system".

Remove the "+1" conversion from nds32_get_gdb_fileio_info().
Add the "+1" conversion in gdb_fileio_reply().

[1] http://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;f=gdb/remote-fileio.c;h=11c141e42c4d#l381
[2] "Semihosting for AArch32 and AArch64, Release 2.0"
    https://static.docs.arm.com/100863/0200/semihosting.pdf

Change-Id: I35461bcb30f734fe2d51f7f0d418e3d04b4af506
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5322
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-12-19 20:40:55 +00:00
Peter Mamonov
80f1a92bd7 mips64: Add generic mips64 target support
Change-Id: I2bdd2573f23e65652686d18031698f423eec77c0
Signed-off-by: Konstantin Kostyukhin <kost@niisi.msk.ru>
Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru>
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
CC: Dongxue Zhang <elta.era@gmail.com>
CC: Paul Fertser <fercerpav@gmail.com>
CC: Salvador Arroyo <sarroyofdez@yahoo.es>
CC: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/2322
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-11-28 19:49:10 +00:00
Peter Mamonov
1fbe8450a9 mips: Add MIPS64 support
The patch adds support for processors implementing MIPS64 instruction set.

Change-Id: I79a983dfdead81553457a0f3e9e739a9785afaac
Signed-off-by: Konstantin Kostyukhin <kost@niisi.msk.ru>
Signed-off-by: Andrey Sidorov <anysidorov@gmail.com>
Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
CC: Dongxue Zhang <elta.era@gmail.com>
CC: Paul Fertser <fercerpav@gmail.com>
CC: Salvador Arroyo <sarroyofdez@yahoo.es>
CC: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/2321
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2019-11-28 16:59:15 +00:00
Ake Rehnman
9de7d9c81d STM8 Target relicensing to GPLv2 and later
Change-Id: I21126945c0475399aaf12239b8972fde5fddd845
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/5331
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2019-11-07 08:21:40 +00:00
Florian Fainelli
16065e06ad target/cortex_a: Extract code to read/write from/to register to/from DCC
In preparation for supporting the ARM MCRR and MRRC commands which will
require using two 32-bit registers to read/write a 64-bit internal
register, extract the common logic to read/write from/to a register
to/from DCC and make that parameterized such that we can do this through
not just r0.

Change-Id: Iadb73f5cde8cf5961b5a18ddd198bf39d791e610
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5227
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:22:58 +01:00
Antonio Borneo
5dc5ed5714 target/cortex_a: use aligned accesses for read/write cpu memory slow
Armv7a is able to read and write memory at un-aligned address, but
only when bit SCTLR.A (Alignment check enable) is zero and the
address belongs to a memory space with attribute "Normal" (see [1]
chapter A3.2.1 "Unaligned data access"). In all the other cases
the memory access will trigger an alignment fault data abort
exception.
Memory attributes are explained in [1] chapter A3.5 "Memory types
and attributes and the memory order model".

Disabling the MMU cause a change in memory attribute, as explained
in [1] chapter B3.2 "The effects of disabling MMUs on VMSA
behavior".
This can cause several issues. e.g. a SW breakpoint on un-aligned
4-byte Thumb instruction, set when MMU is on, can be impossible to
remove when MMU turns off.

While is possible to check all the possible conditions before an
un-aligned memory access, it's clearly more maintainable to skip
such complexity and only perform aligned accesses.

Check the alignment and eventually modify the data size before
calling the functions cortex_a_{read,write}_cpu_memory_slow().
Change the comment in the two functions above to comply with the
new behaviour.

[1] ARM DDI 0406C.d - "ARM Architecture Reference Manual, ARMv7-A
    and ARMv7-R edition"

Change-Id: I57b4c11e7fa7e78aaaaee4406a5734b48db740ae
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5138
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:20:58 +01:00
Bohdan Tymkiv
5f42124a40 adi_v5_jtag: avoid RAM exhaustion by limiting jtag queue size
Issue has been found when I tried to read 64 MiB QSPI flash bank.
Bank is memory mapped, default_flash_read() is used for 'flash read_bank'
command. OpenOCD consumed as much as 6.8 GiB of RAM during this
process. Investigation showed that this happens because JTAG queue
is not limited in any way. OpenOCD queues 16 millions of AP reads
allocating all corresponding data structures.

Most of this memory is allocated in:
cmd_queue_alloc (commands.c) - 4.2 GiB
dap_cmd_new (adi_v5_jtag.c) - 2.25GiB

This patch implements a pool of "struct dap_cmd" objects using
linked list. Objects are taken from a pool in "dap_cmd_new()" and
returned to the pool when they are not needed. Size of the pool
is limited to 64K of objects, JTAG queue is forcibly executed
when this limit is reached.

Checked with Valgrind and Clang analyzer - no new warnings.

Change-Id: I5aaaecce5ed71414f7965a2598f49742f6a6b2b5
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4948
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-10-18 09:20:49 +01:00
Andreas Fritiofson
f545044c2a target: Switch to target_read_buffer() in verify_image fallback
The current code checks the count to determine whether to read bytes or
words. However it fails to consider whether the base address is suitably
aligned.

Instead use the target_read_buffer() function which is for exactly this
purpose and generates optimal accesses with natural alignment.

Change-Id: I32ab5417890ee2219902df1529bc220fe353b4c7
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3217
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-10-18 09:17:24 +01:00
Han Hartgers
642a9310ca target/dsp563xx: dsp563xx restore reg support
Added "exist=true" field to the reg_list struct to make access to the
dsp563xx registers again possible. Without it defaults to exist=false
and all the reg related functions will return nothing.

Fixes regression from b5964191f0

Change-Id: I9c256346735b8d66919c4ba83f528a8afca46ff9
Signed-off-by: Han Hartgers <han.hartgers@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5239
Tested-by: jenkins
2019-09-08 11:52:06 +01:00
Tim Newsome
0819541366 gdb_server, rtos: Fine-grained RTOS register access
1. Add get_thread_reg() to rtos. It's used in rtos_get_gdb_reg() to read
the value of a single register, instead of reading all register values
by calling get_thread_reg_list().
2. Add set_reg() to rtos. gdb_server uses this to change a single
register value for a specific thread.
3. Add target_get_gdb_reg_list_noread() so it's possible for gdb to get
a list of registers without attempting to read their contents.

The clang static checker doesn't find any new problems with this change.

Change-Id: I77f792d1238cb015b91527ca8cb99593ccc8870e
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/5114
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-08-28 08:07:37 +01:00
Antonio Borneo
6ea43726a8 cortex_m: set C_DEBUGEN in soft_reset_halt
The command "soft_reset_halt" is deprecated since mid 2013 with
the commit 146dfe3295 ("cortex_m: deprecate soft_reset_halt").
Nevertheless it is still extremely useful with multicore chips
where it allows to reset only one of the cores, option not
available through asserting the chip-wide srst.
Without a better replacement of the command, it's worth fixing it.

Accordingly to ARM DDI 0403E.d, chapter C1.4.1 "Entering Debug
state on leaving reset state", to halt the core at reset both bits
DHCSR.C_DEBUGEN and DEMCR.VC_CORERESET must be set.
Current code only sets the latter bit, relying on having C_DEBUGEN
already set through other commands, e.g. "halt". This prevents the
command "soft_reset_halt" to work if issued as very first command.

Set the bit C_DEBUGEN in command "soft_reset_halt".

Change-Id: I66bfd6a0da1fca5049dea037b4d258cf6f842966
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4987
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-20 19:51:01 +01:00
Marc Schink
0d47d85ff5 target/cortex_m: Add support for AHB5-AP
The AHB5-AP is implemented in Cortex-M23/33 based devices.

Change-Id: I505954a2e2c6462ce0aa96eba1d55b016c5028b9
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5232
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2019-06-19 10:17:38 +01:00
Marc Schink
1f1558e74b target/arm_adiv5: Add type for AHB5-AP
This access port type comes with the AMBA 5 protocol specification,
see 'C1.3 AP' in ARM IHI 0031D.

Change-Id: I3c4f0a69230daaf4f5f979de6213fe3c025a089a
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5231
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
2019-06-19 09:51:54 +01:00
Omair Javaid
bc94ca241a Support for debugging on ARMv8-M CPUs
This patch adds ARMv8-M CPUs detection logic in ARMv7m target specific code.

Also adds a slightly different watchpoint manipulation logic for ARMv8-M.

This is based on ARMv8-M architecture reference manual.

Tested on ARM Musca A board.

Change-Id: I0652560954ef02c378a7067fab586edf39d3e9cc
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4997
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-19 09:35:05 +01:00
Antonio Borneo
4dbcb1e79d target/cortex_a: remove dependency from jtag queue
Replace jtag specific API jtag_add_reset() with transport
independent API adapter_{de}assert_reset().

Change-Id: I1b917a4c1205115c4e0315373d81a9305e931258
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4944
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-14 12:10:56 +01:00
Antonio Borneo
18f4ef0f5e target/aarch64: remove dependency from jtag queue
Replace jtag specific API jtag_add_reset() with transport
independent API adapter_{de}assert_reset().

Change-Id: I32c43e2e47366363521fa3f387de9e2fb1c20852
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4943
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-14 12:10:40 +01:00
Antonio Borneo
1af83682e0 target: fix error on TCL command "return" in target event handler
The TCL command "return" always returns error code JIM_RETURN, to
indicate that the effective error code and message are elsewhere.

In the current implementation, the caller of target's event only
checks for return code JIM_OK and considers any other value,
including JIM_RETURN, as an error condition, thus dumping the
call-trace. The execution is not stopped because the error is not
further propagated, but the error message is annoying and
misleading.

It can be tested running
	openocd -f ./test.cfg
using the following script "test.cfg". You can replace the board
file in line 1, to use a board available in your lab:
  1	source [find board/st_nucleo_f4.cfg]
  2	[target current] configure -event reset-start {}
  3	[target current] configure -event reset-end {return}
  4	init
  5	proc a {} {[target current] invoke-event reset-start}
  6	proc b {} {[target current] invoke-event reset-end}
  7	proc c {} {a;b;echo "arrived at the end"}
  8	c
  9	shutdown
The execution produces:
	./test.cfg:7: Error:
	in procedure 'c' called at file "./test.cfg", line 8
	in procedure 'b' called at file "./test.cfg", line 7

	arrived at the end
that shows the call-trace but does not halt the execution.

The developer can avoid using the "return" command in the event
body by defining a TCL procedure that implements the handler and
that contains the "return" command, reducing the handler body to
a simple call to the procedure above. But this approach is either
not documented nor always intuitive while writing the handler,
causing waste of time to look for the false error.

Modify target_handle_event() to detect the specific return value
of the "return" command and to test the real error code that is,
eventually, specified to the TCL "return" command.

Change-Id: I2b860bab7233c6ed13ee4098e348d7533e1c4626
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4974
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-13 12:40:37 +01:00
Tomas Vanek
20396e56b7 target: make target re-configuration possible again
Before commit 877cec20dc
("command: check command mode for native jim commands") all the jim commands
were erroneously treated as they had mode COMMAND_ANY.

The command '$_TARGET configure -xxx' was therefore applicable on running
OpenOCD to change the target configuration. It is handy e.g. for changing
an event handler or changes of the work area.

Change 'configure' command .mode to COMMAND_ANY to make it possible again.

The only parameter which cannot be re-configured after init is -gdb-port.
Test the command mode and refuse setting of gdb port after init.

Change-Id: I88493ac10a46647dc52a88fbc9f8ce6b5ba3bcd0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5214
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:15:51 +01:00
Michael Schwingen
7a27423e31 fix XScale register access
since b5964191f0, all XScale-specific registers were missing, breaking
config scripts.

Change-Id: Ia56f3ca17500ba54bd08f417e9a5aaaa8a1be8c4
Signed-off-by: Michael Schwingen <spam-openocd@discworld.dascon.de>
Reviewed-on: http://openocd.zylin.com/5136
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-12 15:15:40 +01:00
Antonio Borneo
48478967db mem_ap: fix format of logged addresses
The macro TARGET_ADDR_FMT, defined in helper/types.h, already
includes the prefix "0x" in front of the hexadecimal number,
being defined as:
	#define TARGET_ADDR_FMT "0x%8.8" TARGET_PRIxADDR
An additional "0x" is present in mem_ap; it prints debug messages
with a double "0x" before the address:
	Debug: 2921 34180 mem_ap.c:153 mem_ap_write_memory():
	Writing memory at physical address 0x0x5000000c; size 4;
	count 1

Remove the incorrect hexadecimal prefix.

Change-Id: I38f19ed2a2f542bd5df53e947a2604f1cbe80e08
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5222
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:15:29 +01:00
Florian Fainelli
f935f39cda armv7a_mmu: Add support for decoding Super Sections
The ARMv7-A architecture supports super sections which allows mapping
physical addresses up to 40-bit into a 32-bit virtual address using the
short descriptor format (see ARM DDI 0406C.c section B4.1.112 for
details).

Change-Id: I8e64d0e93e36ae7a7da7b7bf2a8342856bb044f1
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5212
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:50 +01:00
Florian Fainelli
eeabbd58c0 armv7a_mmu: Do not restrict virtual addresses to uint32_t
In preparation for adding super section decoding, do not restrict
armv7a_mmu_translate_va_pa() to 32-bit virtual addresses since ARMv7-A
processors with VMSA extensions (including LPAE) can issue wider
physical addresses. Update casting to uint32_t where necessary.

Change-Id: Id1c3d0d5ac324cbdc334259d9ea75fe4981671a1
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5211
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:44 +01:00
Florian Fainelli
604dded6f1 armv7a_mmu: Remove armv7a_mmu_translate_va()
This function is not used anywhere in the tree, remove it, such that we
only have a single function moving forward that might need to deal with
short vs. long format specifics.

Change-Id: I80e81cd7eba1e028d1afaeaedb675b46c0ca6fa1
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5213
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:37 +01:00
Florian Fainelli
ba11adb833 armv7a_mmu: Check earlier for PAR read
Check earlier that the read of the PAR register was successful instead
of starting the decoding and then checking for an error reading that
register.

Change-Id: Id96c2b2f76d2d1c745fcfa55ad4c1e6db92106f9
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5215
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-06-12 15:14:27 +01:00
Tomas Vanek
215f14bec8 target/armv7m: fix register number in armv7m_get_core_reg()
armv7m_get_core_reg() calls arm->read_core_reg()
arm->read_core_reg() expects the register number as an index
to core reglist, not an ARMv7M specific register code.
Use reg->number instead of armv7m_reg->num.

The change solves assert
  src/target/armv7m.c:222: armv7m_read_core_reg: Assertion
  `num < (int)armv7m->arm.core_cache->num_regs' failed.
when gdb 'info reg' is issued on a Cortex-M target and
no cortex_m_debug_entry() has been called since OpenOCD start
(target was halted before OpenOCD start).

Change-Id: I32a2294693ef979b613be93aeceb3b0eb06ee6df
Ticket: https://sourceforge.net/p/openocd/tickets/216/
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5203
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-06-10 20:35:39 +01:00
Antonio Borneo
02cd1e39cc target/cortex_m: remove dependency from jtag queue
Since the first commit 09883194f8 that introduced cortex_m, the
code has a delay of 50ms after srst has been asserted.
The specific delay is implemented through the JTAG_SLEEP command
sent in the jtag queue.

To remove the dependency from the jtag queue, replace the delay
with a transport independent function.

In case of jtag transport, this change keeps the same behaviour
only if the jtag queue has been flushed before the delay. This
does not happen if the call to dap_dp_init(), few lines above,
fails while calling a dap_queue_dp_{read,write}(); in this case
the jtag queue will be flushed later, after the delay, while in
the original code the delay would follow the flushing of the
commands already queued. Anyway, this different behavior would
only happen in case of DAP already not responsive so anticipating
the delay in such error condition is not supposed to add further
problems.

Change-Id: If15978246764e4266b10e707d86c03e5ed907de7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4912
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-06-06 16:33:30 +01:00
Leonard Crestez
2288394b45 arm_adi_v5: Split CSW bits into AHB/APB/AXI
The implementation-defined bits have different semantics for each bus
and different recommended defaults.

Change-Id: I562fe24643bb1f3abc696339e382a75ccf2f2873
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5124
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-25 21:50:30 +01:00
Tomas Vanek
51ef02a5d1 target: make handle_md_output() global
Remove a copy of handle_md_output() from src/target/dsp563xx.c

Change-Id: Iadd003fd1dcdbc7990d46a58ee2e7c30826ac6af
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5175
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-05-23 22:16:39 +01:00
Tarek BOCHKATI
5b768b0d39 cortex_m: set the debug reason to DBGRQ when NVIC_DFSR indicates EXTERNAL
By definition the EXTERNAL bit in Debug Fault Status Register indicates
that an external debug request (EDBGRQ) signal was asserted.

Usage example: this could be done by CTI in multicore devices in order to
halt all the cores together.

Change-Id: I7830455ce5da6702b7d08c8fa7bfe80e4d8a5055
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5157
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23 22:13:41 +01:00
Antonio Borneo
5fbf4d4cc3 target: remove unused function target_buffer_get_u8()
Left unused after commit "target: unify memory read/write
commands", can be removed.

Change-Id: Iea6ef9204c8071283a66a679b3d6edbb0c929c5c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5153
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-23 22:11:30 +01:00
Marc Schink
4f9ad16610 target: Fix breakpoint usage
Change-Id: I28630e5062ffb16939250f7ec7549200f3a9b285
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5139
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 20:03:11 +01:00
Antonio Borneo
31c67cc830 target: fix output of command "targets"
Part of the output is generated with log functions.

Change prototype of find_target() and use command_print() for all
the output of the command.

Change-Id: Ia9fdb653fd5b27be427381053a037545faa34414
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5092
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2019-05-14 19:40:04 +01:00
Antonio Borneo
6cb5ba6f11 helper/command: change prototype of command_print/command_print_sameline
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.

Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
	sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
	's/\(command_print(cmd\)->ctx,/\1,/'
	's/\(command_print(CMD\)_CTX,/\1,/'
	's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
	's/\(command_print_sameline(cmd\)->ctx,/\1,/'
	's/\(command_print_sameline(CMD\)_CTX,/\1,/'
	's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'

This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.

Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 19:37:11 +01:00
Paul Fertser
7060286175 target/esirisc_trace: change prototype of trace dump functions
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of esirisc_trace_dump*() functions to pass CMD
instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ia43bff112372cbb76e1aea9f59f4a9b6df05c15d
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5079
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
2019-05-14 19:36:53 +01:00
Paul Fertser
3f8f7352d2 target/esirisc_trace: change prototype of trace analyse functions
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of esirisc_trace_analyze*() functions to pass CMD
instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ie7cfd323fe591a987ea648a20be2bb9c7273dde8
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5078
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
2019-05-14 19:36:46 +01:00
Paul Fertser
fd66dfb61d target: change prototype of binprint()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of binprint() to pass CMD instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I5ebdc50417d97c791c98ac0cfe2218319809eb7f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5077
Tested-by: jenkins
2019-05-14 19:36:41 +01:00
Paul Fertser
20184ea861 target: change prototype of handle_bp_command_set()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of handle_bp_command_set() to pass CMD instead of
CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: If00f9cfb784b53bb3df92d4469178e2f930a146a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5076
Tested-by: jenkins
2019-05-14 19:36:34 +01:00