Changes from the flat namespace to heirarchical one. Instead of writing:
#include "log.h"
the following form should be used.
#include <helper/log.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "jim.h"
the following form should be used.
#include <helper/jim.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "ioutil.h"
the following form should be used.
#include <helper/ioutil.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "fileio.h"
the following form should be used.
#include <helper/fileio.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "configuration.h"
the following form should be used.
#include <helper/configuration.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "command.h"
the following form should be used.
#include <helper/command.h>
The exception is from .c files in the same directory.
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "binarybuffer.h"
the following form should be used.
#include <helper/binarybuffer.h>
The exception is from .c files in the same directory.
Includes the src directory in the search path, so header files may be
migrated from:
#include "foo.h"
to
#include <module/foo.h>
which is more conducive for installation.
Moves JTAG interface drivers to src/jtag/drivers/,
Adds src/jtag/drivers/Makefile.am.
Builds libocdjtagdrivers.la.
Flattens the rlink driver files into the drivers/ directory, adding
the 'rlink_' prefix or '.rlink' suffix as appropriate.
Remove the remaining extra copy of DSCR, and the register cache
of which it was a part. That cache wasn't a very safe, or even
necessary, idea; it was essentialy letting debugger-private state
be manipulated by Tcl code that couldn't know how to do it right.
This makes the "reg" output of an ARM11 resemble what most other
ARM cores produce ... forward motion in the "make ARM11 work like
the rest of the ARM cores" Jihad!
Just store a clean copy of DSCR in the per-CPU struct, so we
trivially pass a pointer to a recent copy. This replaces the
previous "last_dscr" and cleans up most of the related calling
conventions ... but it doesn't remove the other DSCR copy.
Don't expose the WDTR register through the register cache any
more. If anyone wants Tcl scripts to be able to use DCC based
communication with app code in the target, this wouldn't do it.
Bugfix: don't trust the Tcl-accessible version of DSCR to
flag whether WDTR needs to be restored when resuming.
Don't expose the RDTR register through the register cache any
more. If anyone wants Tcl scripts to be able to use DCC based
communication with app code in the target, this wouldn't do it.
Bugfix: don't trust the Tcl-accessible version of DSCR to
flag whether RDTR needs to be restored when resuming.
Streamline arm11_on_enter_debug_state() entry:
- It should handle the standard updates:
* target->debug_reason
* target->state
- Don't waste time re-reading DSCR; just pass it in
Also rename the routine to "arm11_debug_entry()", matching the
convention used elsewhere in OpenOCD.
The new stubs for httpd and ioutil gave errors like:
ioutil_stubs.c: In function ‘ioutil_init’:
ioutil_stubs.c:27: error: implicit declaration of function ‘LOG_DEBUG’
ioutil_stubs.c:28: error: ‘ERROR_OK’ undeclared (first use in this function)
ioutil_stubs.c:28: error: (Each undeclared identifier is reported only once
ioutil_stubs.c:28: error: for each function it appears in.)
Fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add httpd_stubs.c to provide no-op implementations of httpd_start()
and httpd_stop().
Allows these routines to be called unconditionally and ensures the
libocdserver ABI remains unchanged regardless of whether this feature
was built-in or not.
Prints a DEBUG message when the stub implementation is included.
Add ioutil_stubs.c to provide an empty ioutil_init() routine.
Add ioutil.h to prevent applications from needing to declare it.
Allows unconditionally calling that function during startup, and the
resulting libocdhelper library API is now more stable.
Prints a DEBUG message when the stub implementation is included.
Save and display the address of the instruction which triggered the
watchpoint. Because of pipelining, that's well behind the PC value
when debug entry completes. (Example in a subroutine that had been
returned from...)
Remove unused A8 stuff, mostly watchpoint hooks from the header.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Except for USR/SYS mode, the labels for the shadowed SP and LR
registers were reversed. LR is r14; SP is r13. Fix.
This would not affect GDB users; GDB references are positional.
Only folk working directly with OpenOCD register values would
have noticed this bug.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Actually this should handle both breakpoints and watchpoints ... but
the DPM framework only handles watchpoints for now. Works on Beagle.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This is a NOP unless the underlying core exposes two new methods, and
neither of the two cores using this (ARM11xx, Cortex-A8) do so yet.
This patch only updates those cores so they pass a flag saying whether
or not to update breakpoint and watchpoint status before resuming; and
removing some now-needless anti-segfault code from ARM11. Cortex-A8
didn't have that code ... yes, it segfaulted when setting watchpoints.
NOTE: this uses a slightly different strategy for setting/clearing
breakpoints than the ARM7/ARM9/etc code uses. It leaves them alone
unless it's *got* to change something, to speed halt/resume cycles
(including single stepping).
ALSO NOTE: this under-delivers for Cortex-A8, where regions with size
up to 2 GBytes can be watched ... it handles watchpoints which ARM11 can
also handle (size 1/2/4 bytes). Should get fixed later.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
In embedded hosts, the Jim interpreter can come from the
existing context rather than be created by OpenOCD.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
We don't need this code, now that the DPM code handles it.
Neither do we need the ARMv7-A CP15 operations; remove their
remnants too. And disable a mostly-needless diagnostic.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Instead of having separate ARM11 and Cortex-A8 implementations of
this code, have one shared implementation which just builds on the
existing "run instruction via R0" support.
This enables followup patches to remove that now-unused code from
those two drivers. (Patches to move the "mrc" and "mcr" code into
"struct arm" are due too ... MIPS and other cores do not support
those ARM-specific concepts.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Switch "mrc" and "mcr" commands to be toplevel ARM operations,
as they should initially have been.
Correct the usage message for both commands: it matches ARM
documentation (as one wants!) instead of reordering them to
match the funky mrc() and mcr() method usage (sigh).
For Cortex-A8: restore a line that got accidentally dropped,
so the secure monitor mode shadow registers will show again.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The ARMv7-A code uses read_cp15() to access fault registers.
Instead, use DPM operations directly, passing in the relevant
MRC instructions.
This eliminates per-operation overhead (though it'll be hard
to observe, this is uncommon) and helps eliminate read_cp15().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There were two chunks of Cortex-A8 code which called the
ARMv7-A CP15 operations; get rid of them, helping prepare
to remove those methods completely:
- post_debug_entry() can use the mrc() method to read
its two registers.
- write_memory() can use dpm->instr_write_data_r0() to
flush the ICache and DCache ... doing it this way is
actually faster since it reduces per-write overhead.
Note that the mrc() method parameters are re-ordered with
respect to the ARM instruction documentation, so that part
can be confusing.
Cleaned up the layout and comments in those areas a bit.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There is no particular reason to invoke jtag_interface_quit()
on the atexit() handler, it just makes the code more obtuse
and stops other legitimate usage of atexit().
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Ensures that the correct information gets displayed, depending on the
mode of the command being denied. Fixes misreporting all commands as
needing to run "before 'init'".
Clean up two aspects to this routine: bad naming, since it
doesn't restore the context, just the banked registers; and
excess indentation for the bulk of the code.
Also make some of its call sites stash the function's return
code; someday they should use it for error checking.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This "loop over all registers" routine shared the same mess as
full_context() in terms of dozens of needless number_to_mode()
calls. Fix that, and comments, with related cleanup.
The misnamed xscale_restore_context() had a related bug. It
was restoring the *WRONG REGISTERS* ... always from whatever
the current mode was, instead of using the copy from whichever
register bank it was trying to restore. (But it marked the
intended register as having been restored...) Fixed that.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Finish removing references to the 'interp' global variable from the
command module, encapsulating all reference via command_context.
Eliminates use of the global entirely, so it can be removed. Hurrah!
Adds a log_capture_state structure to pass to the log capture
callback used by the command module. Ensures that the capture occurs
in the proper context.
The 'help' text will become more verbose, so its entire text will be
far more than desired when you only borked your syntax. The usage
still allows the commands to be looked up for more help.
command_done() does not need to return an error, but it needed
Doxygen comment. Provide some for copy_command_context as well.
Note: this audit revealed some potential bugs with the command context
implementation. There was a reason that commands were added at the
end of the list. Shallow copying of command_context means that
the list is shared between them. And commands added at the top-level
before the pre-existing commands will not be available in the shared
context as they were before. Yikes!
Fortunately, this does not seem to occur in general use, as
'add_help_text' gets registered in startup.tcl and claims the first slot
in my own test cases. Thus, it seems that we have been masking the issue
for now, but it shows the need for further architectural improvement in
the core command module.
With the ability to defer 'init', users can access the help system while
still in CONFIG mode. This patch omits commands from the help and usage
list when they cannot be run in the current command mode, making it much
easier to see what can be done at a given time.
Adds 'noinit' command to prevent OpenOCD from running 'init' at the end
up startup, allowing it to be given from telnet or TCL. This provides
the old behavior by default, and users can add this command to their
scripts to get the new behavior.
Moves the telnet and TCL server startup to server_init(), moving their
respective command registration in to server_register_commands().
Adds proper error checking for these particular startup processes.
Moves the core server startup to openocd_main(), improving related error
checking and preparing to defer 'init'.
Rework gdb_init to create flexible APIs (gdb_target_add_{one,all}) and
static helper (gdb_target_start) for starting GDB services. Eliminates
duplicated code and provides general mechanisms for adding GDB services.
The 'init' command is updated to call the new API, and later patches can
decouple its policy of adding all targets therein.
Provides the new capability to use both piped and TCP servers when
multiple targets are defined. The first target fills the pipe, and
others will be started on TCP ports (unless disabled, i.e. gdb_port=0).
Add missing COMMAND_REGISTRATION_DONE.
For now the command syntax for zy1000 needs to be compatible
across 0.3/0.4, the world outside OpenOCD interfaces to
zy1000 using the old syntax. Post 0.4 release(0.4.1 even)
I'll switch to subcommand scheme.
Switch to subcommands post 0.3 lifecycle.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Streamline the loop by continuing as soon as we know there's no
work to be done; this lets us un-indent almost everything.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When fetching all the registers, XScale was doing various stupid
things like calling number_to_mode() a few dozen times instead of
just once, and mapping access to each register three times (again,
instead of just once). Stop that.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use the new mapping interfaces in the debug entry path.
SPSR and the banked registers now have smaller and faster
accessors ... use them.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Code other than main() may invoke "init". When it does so,
customized handlers may need to run ... so make sure the
command context state is updated before they do so.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Those commands presume support for the "classic" set of CPU
modes (FIQ, supervisor, IRQ, etc) ... which aren't supported
by the ARMv7-M or ARMv6-M architectures. They also presume
a "struct arm" base type, which this code doesn't use.
We haven't cleaned up the register handling enough to be able
to share any of those "base" methods.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Eliminate the monolithic tcl_target_func by registering each of its
commands using the new chained command registration mechanism.
Also chains the target's commands under the CPU command, though these
may not work properly without some further modification.
The 'target' command group was implemented using its own command
dispatching, which can be eliminated by using the new chained command
registration mechanism. This patch splits the jim_target() function
into individual handlers, which makes them to be visible to the help and
usage commands. These one-trick handlers are much easier to understand.
Splits bulk of the jtag_tap_configure into jtag_tap_configure_event,
removing three or four levels of indentation in the process.
The resulting code was stylistically improved in other ways, but it
should be functionally identical.
Moves the tertiary jim handlers and required static helpers to the top
of tcl.c, defining them in a new registration array that is chained in
both the top-level context and under the jtag command. The top-level
commands can be removed at some point in the future to reduce clutter.
Explodes the 'jtag' into separate command handlers, which are easier
to understand and extend. Makes the code much easier to understand,
though further simplifications are possible. This patch tries to
minimize the noise when viewed with 'git diff -w'.
Gives these commands improved built-in help and usage information.
Two 'rm' commands were implemented and registered. This removes the
version that would have never been called prior to refactoring the
command registration.
Adds checks for memory allocation failures. Started to use calloc()
instead of malloc()/memset(), but I got carried away. This kind of work
should be done throughout the tree, but it's almost hopeless at present.
Splits the check for a command's ability to run into a helper.
This also fixes a bug whereby commands that specified COMMAND_EXEC
were allowed to run during the configuration stage. This allowed
problematic commands to be called before 'init', defeating the intention
of specifying that command mode. With this change, the run_command()
helper denies access to handlers that should run only after 'init'
during the configuration stage.
Presently, commands registration taks a static handler data pointer.
This patch adds support for commands that require a dynamic pointer,
such as those registered in a dynamic context (e.g. subcommands for a
user-created 'foo.cpu' command). The command_set_handler_data will
update a command (group) to use a new context pointer, while the
CMD_DATA macro allows command handlers to access the value.
Jim handlers should find this value in interp->cmdPrivData.
Updates command registration to provide top-level handlers for all
commands, rather than falling back onto the 'unknown' command. Instead,
that same handler is registered for placeholders, providing the same
functionality under the root verb command name instead. This permits
users to implement their own 'unknown' function, and it resolves some
mind-bending breakage related to function object lookup while recursing.
Changes 'ocd_bounce' to call 'ocd_command' and 'ocd_help' from the
wrapper directly, rather than bouncing through their wrappers. This
prevents endless recursion caused by the above changes, whereby the
'command' wrapper's type check would blow the stack to hell and gone.
Adds 'ocd_bouncer' in startup.tcl that is called as a helper for
all command handlers, shrinking the embedded C wrapper to a mere stub.
Jim handlers are called directly, simple handlers get called with the
wrapper to capture and discard their output on error, and placeholders
call help directly (though the unknown handler still does this too).
It attempts to improve the quality of the error messages as well.
Adds the 'command' group handler, with the 'type' command producing
a string that tells whether the given command is 'native' (for Jim-based
command handlers), 'simple' (for simple built-in commands), 'group'
for command group placeholders, and 'unknown' if not found in the
command registration tables (e.g. core built-ins functions).
There is no DEBUG() macro; don't call one! Always at
least *parse* debug code, to help prevent such errors.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
In target_type.h it's documented that the target must be
halted for add_breakpoint() ... and with slight ambiguity,
also for its add_watchpoint() sibling. So rather than
verifying that constraint in the CPU drivers, do it in the
target_add_{break,watch}point() routines.
Add minor paranoia on the remove_*point() paths too: save
the return value, and print it out in in the LOG_DEBUG message
in case it's nonzero.
Note that with some current cores, like all ARMv7 ones I've
looked at, there's no technical issue preventing watchpoint or
breakpoint add/remove operations on active cores. This model
seems deeply wired into OpenOCD though.
ALSO: the ARM targets were fairly "good" about enforcing that
constraint themselves. The MIPS ones were relied on other code
to catch such stuff, but it's not clear such code existed ...
keep an eye out for new issues on MIPS.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use the new "reset-assert" event; else SRST; else fail.
Tested on an OMAP3, using the event.
NOTE: still doesn't handle "reset halt". For some reason
neither VCR nor PRCR seemed effective; they held the value
that was written, but VCR didn't trigger debug entry when
the reset vector fired (maybe the vector needs configuring?)
and PRCR refused to hold the chip in reset until deassert()
could force the core into debug state.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This defines a "reset-assert" event and a supporting utility
routine, and documents both how targets should implement it
and how config scripts should use it. Core-specific updates
are needed to make this work.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
When writing to a chip's "reset yourself" register, the ARM11 code
was reporting a spurious failure. Just don't bother checking for
correctly incremented pointers given single-unit writes ... it's
a bit faster that way too. (Reads should likely do the same thing.
For that matter, such checks are usually just a waste...)
Shrink an overlong parameter name, and associated lines'o'code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The command refactoring caused subcommand handlers to produce duplicate
output when run. The problem was introduced by failing to ensure all
such invocations went through a top-level "catcher" script, prefixing
the command name with the 'ocd_' prefix and consuming its results.
The fix is to ensure such a top-level "catcher" script gets created
for each top-level command, regardless of whether it has a handler.
Indeed, this patch removes all command registrations for sub-commands,
which would not have worked in the new registration scheme anyway.
For now, dispatch of subcommands continues to be handled by the new
'unknown' command handler, which gets fixed here to strip the 'ocd_'
prefix if searching for the top-level command name fails initially.
Some Jim commands may be registered with this prefix, and that situation
seems to require the current fallback approach. Otherwise, that prefix
could be stripped unconditionally and the logic made a little simpler.
The same problem must be handled by the 'help' command handler too,
so its lookup process works as intended.
Overall, the command dispatching remains more complicated than desired,
but this patch fixes the immediate regressions.
Move device argument parsing after check for number of arguments;
otherwise, calling this command without any arguments would access
argv[0] before checking whether it even existed.
Fixed the header file to properly specify the doxygen documentation for the
items defined in it.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This updates the functions in the file to all have doxygen comments
describing what they do.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Created a function for copying code to the working area on
a target. The NAND write and read functions are updated to
include use of this function.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Implementation of the NAND read function for ARM NAND I/O that
includes running a local algorithm on a device to increase the
performance of block reads.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Just make these fail, instead of letting them write over
potentially random memory. Users should be able to work
around the lack of real implementations by disbling the
MMU by hand ... until someone provides a Real Fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Command upgrading introduced two off-by-one bugs in the flash commands.
This patch fixes the 'flash {protect,erase_sector}' commands to check
that they have been passed the correct number of arguments.
Ammended during commit to fix help text for 'erase_address' too.
Several of the sites now using target_type_name() really
ought to be using an instance-specific name. Create a
function called target_name(), accessing the instance's
own (command) name.
Use it in several places that really should be displaying
instance-specific names. Also in several places which
were already doing so, but which had no wrapper to call.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
There are two names that may matter on a per-target basis.
One is a per-instance name (for example, "at91sam7s.cpu").
The other is the name of its type (for example, "arm7tdmi"),
which is shared among multiple targets.
Currently target_get_name() returns the type name, which is
misleading and is rarely appropriate for target diagnostics.
Rename that as target_type_name().
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Removes redundant assignment of start_ms from log_register_commands().
Eliminates command_context parameter and return value.
Adds Doxygen comment block for this API call.
Alliteration aside, this should provide the final piece of the puzzle
for developers that want to get started writing a new target type.
In this way, it also seeks to complement the 'dummy' interface driver
and 'faux' NOR flash driver.
Removes hello and foo commands from top-level registration. Instead,
the dummy interface driver and faux flash driver have been augmented
to register these commands as sub-commands.
Factors log capture while running script commands, eliminating
duplicated code between script_command and jim_capture. Factors
setting a command's Jim "retval" into a new helper as well.
Using these new helpers in the new unknown command handler's
fixes possible regressions caused by these bits being missing.
The add_usage_text command uses the same C handler, which was updated
to support its new polymorphic role. This patch updates the two script
commands that needed this support: 'find' and 'script'.
Updates httpd_start() to use register_commands() for 'readform' and
'writeform' commands. Adds server/httpd.h to export the new signatures
for this function (and httpd_stop), which allows removing the obsoleted
declarations inside openocd.c.
Adding jim_handler field to command_registration allows removing the
register_jim helper. All command registrations now go through the
register_command{,s}() functions.
Converts callback to an array of command_registration records.
Moves oocd_trace driver definition to end of file to eliminate
useless forward declaration.
Uses chaining of command_registration structures to eliminate all
target_type register_callback routines. Exports the command_handler
registration arrays for those target types that are used by others.
Changes the jtag_interface->register_callbacks field to a list of
commands to be registered. Changes callback to invocation of
register_commands() with that command registration list. Removes all
JTAG interface driver register_command callback functions, which the
previous commits had converted into identical calls.
Use register_commands() with command registration array.
---
This module was broken by previous changes, but no one has complained.
Are there still users for this modules?
Use the new command registration chaining capabilities to eliminate
the foo_register_commands helper, folding its remaining command
handler setup into the hello_command_handlers registration array.
Adds the ability to chain registration structures. Modules can define a
command with the 'chain' and 'num_chain' fields defined in their
registration table, and the register_commands() function will initialize
these commands. If the registration record creates a new command, then
the chained commands are created under it; otherwise, they are created
in the same context as the other commands (i.e. the parent argument).
Use register_commands() to register low-level command handlers,
adding a builtin_command_handlers declaration that is easy to understand.
Splits help and usage information into their appropriate fields.
Adds the usage command, to display usage information for commands.
The output for this command will remain erronenously empty until
commands are updated to use these new coventions.
The register_commands API takes multiple commands in one call, allowing
modules to declare and pass a much simpler (and more explicit) array of
command_registration records.
Add a structure to encapsulate command registration information, rather
than passing them all as parameters. Enables further API changes that
require additional required or optional parameters.
Updates the register_command API and COMMAND_REGISTER macro to use it,
along with their documentation.
Provides a migration path for the widely used register_command API,
which needs to be updated to provide new functionality.
This macro allows the API to change without having to update all of its
callers at the same time.
There was a lot of needless handshaking overhead in the current
Cortex-A8 DCC/ITR operations, since the status read by each step
was discarded rather than letting the next step know it.
This shrinks the handshaking by: (a) passing status along from
previous steps, avoiding re-fetching; which enables the big win
(b) relying on a useful invariant: that the DSCR_INSTR_COMP bit
is set after every call to a DPM method.
A "reg sp_usr" call previously took 17 flushes; now it takes just 9.
This visibly speeds common operations like entry to debug state and
stepping, as well as "arm reg" and so on.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This replaces two versions of register access functions. One
was commented out, and seemed to have uncertain intent. The
other was fairly new, and helped motivate the DPM framework
once I observed that the ARM11 was doing the very same ops.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This implements the DPM interface for Cortex-A8 cores. It
also adds a synchronization operation to the DPM framework,
which is needed by the Cortex-A8 after CPSR writes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make various functions static, add some comments, report
vector catch as a flavor of DBG_REASON_BREAKPOINT, get
rid of needless/undesirable ARMV4_5_CORE_REG_MODE, etc.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The previous implementation was unnecessarily complex. Get rid of the loops,
let vsnprintf() tell us directly how much storage we need and allocate that. A
second pass writes the actual string. Also add a va_end() that was missing.
This should be much faster for large strings and less wasteful for small ones.
A quirk that has been retained is that some callers patch in a newline at the
end of the returned string and depend on alloc_vprintf to allocate at least
one byte extra.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Zachary T Welch <zw@superlucidity.net>
Rewrite rlink_init routine to use jtag_usb_open helper. Eliminates
some spurious calls to exit().
Wraps a tremendously long line of comment to fit 80 columns too.
Begins to consolidate code used by several USB JTAG interfaces.
This first patch provides the required build system changes and
a common jtag_usb_open routine, which will replace the guts for
probing the busses and devices for possible VID/PID matches.
The following patches convert each driver to use it.
This finishes the basic switchover to the new register code,
for everything except the debug registers. (And maybe we
shouldn't have a cache for *those* which works this way...)
The context save/restore code now uses the new code, but
it's in a slightly different sequence. That should be fine
since the R0/PC/CPSR stuff is all that really matters (and
if we can update those, we can update the rest).
Now there's no longer a way any code can be confused about
which copy of "r1" (etc) to use.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
As with single stepping, the previous stuff was needed because
the ARM11 code wasn't using the standard ARM base type and
register access ... but now those mechanisms work, so we can
switch out that special-purpose glue, in favor of the more
thoroughly tested/capable "standard" code.
Fixes a bug in the resume() implementation: it wasn't handling
two of its arguments correctly, preventing the "flash erase_check"
algorithm from working. (This code needs a *subsequent* update
for correct register handling, though... removing the confusion
about which "r2", for example, to use.)
This should resolve some "FIXME" comments too, for Thumb and
processor mode support. It also gets rid of a nasty exit()
call; servers should only have *clean* shutdown paths.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The previous stuff was needed because the ARM11 code wasn't using
the standard ARM base type and register access ... but now those
mechanisms work, so we can switch out that special-purpose glue.
This should resolve all the "FIXME -- handle Thumb single stepping"
comments too, and properly handle the processor's mode. (Modulo
the issue that this code doesn't yet handle two-byte breakpoints.)
Clarify the comments about the the hardware single stepping. When
we eventually share breakpoint code with Cortex-A8, we can just make
that be the default on cores which support it. We may still want an
override command, not just to facilitate testing but to cope with
"instruction address mismatch" not quite being true single-step.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This provides "standard" ARM register support -- with twenty or
more shadow registers on top of what this code now handles, but
properly associated with the various core modes -- parallel to
the current register code. That is, the current code is stilil
managing the "current" registers; the new code shadows them.
You can see all the registers with "arm reg", modify the shadows
like "r8_fiq" or "sp_abt" with "reg", and see them get properly
written back when you step. (Just don't do that with any of the
registers managed by the "old" code ...)
It also switches to using more standard code, relying on those
standard registers, in two places: (a) the poll status display,
which now shows core state (ARM/Thumb/...) and mode (Supervisor,
IRQ, etc); and (b) GDB register access.
So it's not a full migration, there are warts -- every place that
touches the old register cache is a potential bug -- but it's a
small more-or-less-comprehensible step that's even somewhat useful.
Later patches complete the migration.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This was a private mechanism to snapshot registers before leaving
debug state, and then on reentry to optionally display what changed.
It was coupled to the private register cache, which won't be sticking
around in that form for much longer. Remove (instead of teaching
it how to handle *all* the registers).
(The idea is interesting, but we ought to be able to implement
this in a generic way. Ideally through Tcl scripts that can
automatically be invoked following debug entry...)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This is a very thin layer over some of the current ARM11
debug TAP utilities. The layer isn't yet hooked up.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
First version of interface for sharing code between ARMv6 and ARMv7a
debug modules ... now the architecture includes debug support. (Not
the same as for the trimmed-down v7m or v6m though!) This is a first
version of an interface that will let the ARM11 and Cortex-A8 support
share code, features, and bugfixes. Based on existing code from both
of those cores.
The ARM v7-AR architecture specification calls this commonality the
"Debug Programmer's Model (DPM)", which seemed to be an appropriate
acronym -- a TLA even! -- for use in our code. Made it so. :)
The initial scope of this just supports register access, and is geared
towards supporting top level "struct arm" mechanisms. Later, things
like breakpoint and watchpoint support should be included.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add $HOME/.openocd as the first default script search directory, allowing
the user to override the standard scripts.
Update the user guide with information on where OpenOCD expects to find
configuration files and scripts. Also fixed some minor formatting issues.
Add entry to NEWS as well.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
For now there's no point in saving this stuff after examine()
checks it out as OK. Ditto exporting symbols that aren't
used outside of the module which defines them. In fact, those
two things needlessly complicate the code...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make this code look more like the rest of the OpenOCD code.
- Use calloc() directly, not NEW() ... and fix some potential
memory leaks while we're at it.
- Remove FNC_INFO ... it's a NOP that just clutters things,
and it's trivial for developers to add tracing as needed.
- Replace FNC_INFO_NOTIMPLEMENTED with LOG_WARNING calls;
ditto. And stop having those call sites wrongly succeed!
- Waste less space with the CHECK_RETVAL() macro.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This will allow data to be allocated in read only
memory instead of on the stack. Speeds things up
and reduces stack usage.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
buf_set_u32() operated on an uninitialized stack
variable with non-byte boundaries, which led to
warnings about reading uninitialized stack.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Start using the arm_reg_current() call. This shrinks and speeds
the affected code. It can also prevent some coredumps coming from
invalid CPSR values ... the ARMV4_5_CORE_REG_MODE() macro returns
bogus registers if e.g. "Secure Monitor" mode isn't supported by
the current CPU.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
We don't need to use size_t in these places; so it's easy
to be rid of the need for this #ifdef and its MS-derived
portability problems.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
With -O3 when inlining aggressively the total stack usage will
be the sum of many fn's, which can easily get out of hand.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Have arm_set_cpsr() handle the two core state flags, updating
the CPU state. This eliminates code in various debug_entry()
paths, and marginally improves handling of the J bit.
Catch and comment a few holes in the handling of the J bit on
ARM926ejs cores ... it's unlikely our users will care about
Jazelle mode, but we can at least warn of Impending Doom. If
anyone does use it, these breadcrumbs may help them to find
the right path through the code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Define arm_reg_current() ... returning handle to a given register,
and encapsulating the current mode's register shadowing. It's got
one current use, for reporting the current register set to GDB.
This will let later patches clean up much ARMV4_5_CORE_REG_MODE()
nastiness, saving a bit of code.
Define and use arm_set_cpsr() ... initially it updates the cached
CPSR and sets up state used by arm_reg_current(), plus any SPSR
handle. (Later: can also set up for T and J bits.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Stash a pointer to the CPSR in the "struct arm", to help get rid
of the (common) references to its index in the register cache.
This removes almost all references to CPSR offsets outside of the
toplevel ARM code ... except a pair related to the current ARM11
"simulator" logic (which should be removable soonish).
This is a net minor code shrink of a few hundred bytes of object
code, and also makes the code more readable.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
